From 862e0d2e1b6524219a492873798a5b5c19589351 Mon Sep 17 00:00:00 2001 From: Aaron Green Date: Mon, 12 Feb 2018 13:07:28 -0800 Subject: [PATCH] Add cpu-aarch64-fuchsia.c Fuchsia/Zircon recently added support for exposing arm64 CPU features; this CL uses the new system call to set OPENSSL_armcap_P. Change-Id: I045dc0b58117afe6dae315a82bf9acfd8d99be1a Reviewed-on: https://boringssl-review.googlesource.com/25865 Reviewed-by: David Benjamin Commit-Queue: David Benjamin CQ-Verified: CQ bot account: commit-bot@chromium.org --- PORTING.md | 2 +- crypto/CMakeLists.txt | 1 + crypto/cpu-aarch64-fuchsia.c | 55 ++++++++++++++++++++++++++++++++++++ crypto/cpu-aarch64-linux.c | 3 +- 4 files changed, 59 insertions(+), 2 deletions(-) create mode 100644 crypto/cpu-aarch64-fuchsia.c diff --git a/PORTING.md b/PORTING.md index bf3807a2..66347ebe 100644 --- a/PORTING.md +++ b/PORTING.md @@ -210,7 +210,7 @@ strings and loading algorithms, etc. All of these functions still exist in BoringSSL for convenience, but they do nothing and are not necessary. The one exception is `CRYPTO_library_init`. In `BORINGSSL_NO_STATIC_INITIALIZER` -builds, it must be called to query CPU capabitilies before the rest of the +builds, it must be called to query CPU capabilities before the rest of the library. In the default configuration, this is done with a static initializer and is also unnecessary. diff --git a/crypto/CMakeLists.txt b/crypto/CMakeLists.txt index 3ca223b4..10959168 100644 --- a/crypto/CMakeLists.txt +++ b/crypto/CMakeLists.txt @@ -134,6 +134,7 @@ add_library( OBJECT + cpu-aarch64-fuchsia.c cpu-aarch64-linux.c cpu-arm.c cpu-arm-linux.c diff --git a/crypto/cpu-aarch64-fuchsia.c b/crypto/cpu-aarch64-fuchsia.c new file mode 100644 index 00000000..98303a03 --- /dev/null +++ b/crypto/cpu-aarch64-fuchsia.c @@ -0,0 +1,55 @@ +/* Copyright (c) 2018, Google Inc. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ + +#include + +#if defined(OPENSSL_AARCH64) && defined(OPENSSL_FUCHSIA) && \ + !defined(OPENSSL_STATIC_ARMCAP) + +#include +#include +#include + +#include + +#include "internal.h" + +extern uint32_t OPENSSL_armcap_P; + +void OPENSSL_cpuid_setup(void) { + uint32_t hwcap; + zx_status_t rc = zx_system_get_features(ZX_FEATURE_KIND_CPU, &hwcap); + if (rc != ZX_OK || (hwcap & ZX_ARM64_FEATURE_ISA_ASIMD) == 0) { + // Matching OpenSSL, if NEON/ASIMD is missing, don't report other features + // either. + return; + } + + OPENSSL_armcap_P |= ARMV7_NEON; + + if (hwcap & ZX_ARM64_FEATURE_ISA_AES) { + OPENSSL_armcap_P |= ARMV8_AES; + } + if (hwcap & ZX_ARM64_FEATURE_ISA_PMULL) { + OPENSSL_armcap_P |= ARMV8_PMULL; + } + if (hwcap & ZX_ARM64_FEATURE_ISA_SHA1) { + OPENSSL_armcap_P |= ARMV8_SHA1; + } + if (hwcap & ZX_ARM64_FEATURE_ISA_SHA2) { + OPENSSL_armcap_P |= ARMV8_SHA256; + } +} + +#endif // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP diff --git a/crypto/cpu-aarch64-linux.c b/crypto/cpu-aarch64-linux.c index f9fa6c5c..0184dd4f 100644 --- a/crypto/cpu-aarch64-linux.c +++ b/crypto/cpu-aarch64-linux.c @@ -14,7 +14,8 @@ #include -#if defined(OPENSSL_AARCH64) && !defined(OPENSSL_STATIC_ARMCAP) +#if defined(OPENSSL_AARCH64) && defined(OPENSSL_LINUX) && \ + !defined(OPENSSL_STATIC_ARMCAP) #include