mirror of
https://github.com/henrydcase/nobs.git
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770 lines
14 KiB
ArmAsm
770 lines
14 KiB
ArmAsm
// +build arm64,!noasm
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#include "textflag.h"
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TEXT ·cswapP503(SB), NOSPLIT, $0-17
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MOVD x+0(FP), R0
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MOVD y+8(FP), R1
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MOVB choice+16(FP), R2
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// Set flags
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// If choice is not 0 or 1, this implementation will swap completely
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CMP $0, R2
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LDP 0(R0), (R3, R4)
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LDP 0(R1), (R5, R6)
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CSEL EQ, R3, R5, R7
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CSEL EQ, R4, R6, R8
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STP (R7, R8), 0(R0)
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CSEL NE, R3, R5, R9
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CSEL NE, R4, R6, R10
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STP (R9, R10), 0(R1)
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LDP 16(R0), (R3, R4)
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LDP 16(R1), (R5, R6)
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CSEL EQ, R3, R5, R7
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CSEL EQ, R4, R6, R8
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STP (R7, R8), 16(R0)
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CSEL NE, R3, R5, R9
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CSEL NE, R4, R6, R10
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STP (R9, R10), 16(R1)
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LDP 32(R0), (R3, R4)
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LDP 32(R1), (R5, R6)
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CSEL EQ, R3, R5, R7
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CSEL EQ, R4, R6, R8
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STP (R7, R8), 32(R0)
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CSEL NE, R3, R5, R9
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CSEL NE, R4, R6, R10
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STP (R9, R10), 32(R1)
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LDP 48(R0), (R3, R4)
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LDP 48(R1), (R5, R6)
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CSEL EQ, R3, R5, R7
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CSEL EQ, R4, R6, R8
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STP (R7, R8), 48(R0)
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CSEL NE, R3, R5, R9
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CSEL NE, R4, R6, R10
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STP (R9, R10), 48(R1)
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RET
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TEXT ·addP503(SB), NOSPLIT, $0-24
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MOVD z+0(FP), R2
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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// Load first summand into R3-R10
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// Add first summand and second summand and store result in R3-R10
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LDP 0(R0), (R3, R4)
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LDP 0(R1), (R11, R12)
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LDP 16(R0), (R5, R6)
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LDP 16(R1), (R13, R14)
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ADDS R11, R3
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ADCS R12, R4
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ADCS R13, R5
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ADCS R14, R6
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LDP 32(R0), (R7, R8)
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LDP 32(R1), (R11, R12)
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LDP 48(R0), (R9, R10)
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LDP 48(R1), (R13, R14)
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ADCS R11, R7
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ADCS R12, R8
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ADCS R13, R9
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ADC R14, R10
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// Subtract 2 * p503 in R11-R17 from the result in R3-R10
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LDP ·P503x2+0(SB), (R11, R12)
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LDP ·P503x2+24(SB), (R13, R14)
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SUBS R11, R3
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SBCS R12, R4
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LDP ·P503x2+40(SB), (R15, R16)
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SBCS R12, R5
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SBCS R13, R6
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MOVD ·P503x2+56(SB), R17
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SBCS R14, R7
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SBCS R15, R8
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SBCS R16, R9
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SBCS R17, R10
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SBC ZR, ZR, R19
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// If x + y - 2 * p503 < 0, R19 is 1 and 2 * p503 should be added
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AND R19, R11
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AND R19, R12
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AND R19, R13
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AND R19, R14
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AND R19, R15
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AND R19, R16
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AND R19, R17
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ADDS R11, R3
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ADCS R12, R4
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STP (R3, R4), 0(R2)
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ADCS R12, R5
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ADCS R13, R6
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STP (R5, R6), 16(R2)
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ADCS R14, R7
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ADCS R15, R8
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STP (R7, R8), 32(R2)
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ADCS R16, R9
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ADC R17, R10
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STP (R9, R10), 48(R2)
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RET
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TEXT ·subP503(SB), NOSPLIT, $0-24
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MOVD z+0(FP), R2
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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// Load x into R3-R10
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// Subtract y from x and store result in R3-R10
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LDP 0(R0), (R3, R4)
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LDP 0(R1), (R11, R12)
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LDP 16(R0), (R5, R6)
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LDP 16(R1), (R13, R14)
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SUBS R11, R3
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SBCS R12, R4
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SBCS R13, R5
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SBCS R14, R6
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LDP 32(R0), (R7, R8)
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LDP 32(R1), (R11, R12)
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LDP 48(R0), (R9, R10)
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LDP 48(R1), (R13, R14)
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SBCS R11, R7
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SBCS R12, R8
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SBCS R13, R9
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SBCS R14, R10
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SBC ZR, ZR, R19
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// If x - y < 0, R19 is 1 and 2 * p503 should be added
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LDP ·P503x2+0(SB), (R11, R12)
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LDP ·P503x2+24(SB), (R13, R14)
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AND R19, R11
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AND R19, R12
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LDP ·P503x2+40(SB), (R15, R16)
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AND R19, R13
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AND R19, R14
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MOVD ·P503x2+56(SB), R17
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AND R19, R15
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AND R19, R16
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AND R19, R17
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ADDS R11, R3
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ADCS R12, R4
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STP (R3, R4), 0(R2)
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ADCS R12, R5
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ADCS R13, R6
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STP (R5, R6), 16(R2)
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ADCS R14, R7
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ADCS R15, R8
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STP (R7, R8), 32(R2)
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ADCS R16, R9
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ADC R17, R10
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STP (R9, R10), 48(R2)
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RET
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TEXT ·adlP503(SB), NOSPLIT, $0-24
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MOVD z+0(FP), R2
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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LDP 0(R0), (R3, R4)
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LDP 0(R1), (R11, R12)
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LDP 16(R0), (R5, R6)
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LDP 16(R1), (R13, R14)
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ADDS R11, R3
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ADCS R12, R4
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STP (R3, R4), 0(R2)
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ADCS R13, R5
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ADCS R14, R6
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STP (R5, R6), 16(R2)
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LDP 32(R0), (R7, R8)
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LDP 32(R1), (R11, R12)
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LDP 48(R0), (R9, R10)
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LDP 48(R1), (R13, R14)
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ADCS R11, R7
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ADCS R12, R8
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STP (R7, R8), 32(R2)
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ADCS R13, R9
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ADCS R14, R10
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STP (R9, R10), 48(R2)
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LDP 64(R0), (R3, R4)
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LDP 64(R1), (R11, R12)
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LDP 80(R0), (R5, R6)
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LDP 80(R1), (R13, R14)
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ADCS R11, R3
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ADCS R12, R4
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STP (R3, R4), 64(R2)
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ADCS R13, R5
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ADCS R14, R6
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STP (R5, R6), 80(R2)
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LDP 96(R0), (R7, R8)
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LDP 96(R1), (R11, R12)
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LDP 112(R0), (R9, R10)
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LDP 112(R1), (R13, R14)
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ADCS R11, R7
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ADCS R12, R8
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STP (R7, R8), 96(R2)
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ADCS R13, R9
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ADC R14, R10
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STP (R9, R10), 112(R2)
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RET
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TEXT ·sulP503(SB), NOSPLIT, $0-24
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MOVD z+0(FP), R2
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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LDP 0(R0), (R3, R4)
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LDP 0(R1), (R11, R12)
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LDP 16(R0), (R5, R6)
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LDP 16(R1), (R13, R14)
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SUBS R11, R3
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SBCS R12, R4
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STP (R3, R4), 0(R2)
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SBCS R13, R5
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SBCS R14, R6
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STP (R5, R6), 16(R2)
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LDP 32(R0), (R7, R8)
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LDP 32(R1), (R11, R12)
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LDP 48(R0), (R9, R10)
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LDP 48(R1), (R13, R14)
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SBCS R11, R7
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SBCS R12, R8
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STP (R7, R8), 32(R2)
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SBCS R13, R9
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SBCS R14, R10
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STP (R9, R10), 48(R2)
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LDP 64(R0), (R3, R4)
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LDP 64(R1), (R11, R12)
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LDP 80(R0), (R5, R6)
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LDP 80(R1), (R13, R14)
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SBCS R11, R3
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SBCS R12, R4
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SBCS R13, R5
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SBCS R14, R6
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LDP 96(R0), (R7, R8)
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LDP 96(R1), (R11, R12)
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LDP 112(R0), (R9, R10)
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LDP 112(R1), (R13, R14)
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SBCS R11, R7
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SBCS R12, R8
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SBCS R13, R9
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SBCS R14, R10
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SBC ZR, ZR, R15
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// If x - y < 0, R15 is 1 and p503 should be added
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LDP ·P503+16(SB), (R16, R17)
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LDP ·P503+32(SB), (R19, R20)
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AND R15, R16
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AND R15, R17
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LDP ·P503+48(SB), (R21, R22)
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AND R15, R19
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AND R15, R20
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AND R15, R21
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AND R15, R22
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ADDS R16, R3
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ADCS R16, R4
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STP (R3, R4), 64(R2)
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ADCS R16, R5
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ADCS R17, R6
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STP (R5, R6), 80(R2)
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ADCS R19, R7
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ADCS R20, R8
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STP (R7, R8), 96(R2)
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ADCS R21, R9
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ADC R22, R10
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STP (R9, R10), 112(R2)
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RET
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// Expects that X0*Y0 is already in Z0(low),Z3(high) and X0*Y1 in Z1(low),Z2(high)
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// Z0 is not actually touched
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// Result of (X0-X1) * (Y0-Y1) will be in Z0-Z3
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// Inputs get overwritten, except for X1
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#define mul128x128comba(X0, X1, Y0, Y1, Z0, Z1, Z2, Z3, T0) \
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MUL X1, Y0, X0 \
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UMULH X1, Y0, Y0 \
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ADDS Z3, Z1 \
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ADC ZR, Z2 \
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\
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MUL Y1, X1, T0 \
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UMULH Y1, X1, Y1 \
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ADDS X0, Z1 \
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ADCS Y0, Z2 \
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ADC ZR, ZR, Z3 \
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\
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ADDS T0, Z2 \
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ADC Y1, Z3
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// Expects that X points to (X0-X1)
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// Result of (X0-X3) * (Y0-Y3) will be in Z0-Z7
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// Inputs get overwritten, except X2-X3 and Y2-Y3
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#define mul256x256karatsuba(X, X0, X1, X2, X3, Y0, Y1, Y2, Y3, Z0, Z1, Z2, Z3, Z4, Z5, Z6, Z7, T0, T1)\
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ADDS X2, X0 \ // xH + xL, destroys xL
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ADCS X3, X1 \
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ADCS ZR, ZR, T0 \
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\
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ADDS Y2, Y0, Z6 \ // yH + yL
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ADCS Y3, Y1, T1 \
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ADC ZR, ZR, Z7 \
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\
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SUB T0, ZR, Z2 \
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SUB Z7, ZR, Z3 \
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AND Z7, T0 \ // combined carry
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\
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AND Z2, Z6, Z0 \ // masked(yH + yL)
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AND Z2, T1, Z1 \
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\
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AND Z3, X0, Z4 \ // masked(xH + xL)
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AND Z3, X1, Z5 \
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\
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MUL Z6, X0, Z2 \
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MUL T1, X0, Z3 \
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\
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ADDS Z4, Z0 \
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UMULH T1, X0, Z4 \
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ADCS Z5, Z1 \
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UMULH Z6, X0, Z5 \
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ADC ZR, T0 \
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\ // (xH + xL) * (yH + yL)
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mul128x128comba(X0, X1, Z6, T1, Z2, Z3, Z4, Z5, Z7)\
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\
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LDP 0+X, (X0, X1) \
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\
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ADDS Z0, Z4 \
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UMULH Y0, X0, Z7 \
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UMULH Y1, X0, T1 \
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ADCS Z1, Z5 \
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MUL Y0, X0, Z0 \
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MUL Y1, X0, Z1 \
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ADC ZR, T0 \
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\ // xL * yL
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mul128x128comba(X0, X1, Y0, Y1, Z0, Z1, T1, Z7, Z6)\
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\
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MUL Y2, X2, X0 \
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UMULH Y2, X2, Y0 \
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SUBS Z0, Z2 \ // (xH + xL) * (yH + yL) - xL * yL
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SBCS Z1, Z3 \
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SBCS T1, Z4 \
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MUL Y3, X2, X1 \
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UMULH Y3, X2, Z6 \
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SBCS Z7, Z5 \
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SBCS ZR, T0 \
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\ // xH * yH
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mul128x128comba(X2, X3, Y2, Y3, X0, X1, Z6, Y0, Y1)\
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\
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SUBS X0, Z2 \ // (xH + xL) * (yH + yL) - xL * yL - xH * yH
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SBCS X1, Z3 \
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SBCS Z6, Z4 \
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SBCS Y0, Z5 \
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SBCS ZR, T0 \
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\
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ADDS T1, Z2 \ // (xH * yH) * 2^256 + ((xH + xL) * (yH + yL) - xL * yL - xH * yH) * 2^128 + xL * yL
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ADCS Z7, Z3 \
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ADCS X0, Z4 \
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ADCS X1, Z5 \
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ADCS T0, Z6 \
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ADC Y0, ZR, Z7
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// This implements two-level Karatsuba with a 128x128 Comba multiplier
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// at the bottom
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TEXT ·mulP503(SB), NOSPLIT, $0-24
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MOVD z+0(FP), R2
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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// Load xL in R3-R6, xH in R7-R10
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// (xH + xL) in R25-R29
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LDP 0(R0), (R3, R4)
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LDP 32(R0), (R7, R8)
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ADDS R3, R7, R25
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ADCS R4, R8, R26
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LDP 16(R0), (R5, R6)
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LDP 48(R0), (R9, R10)
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ADCS R5, R9, R27
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ADCS R6, R10, R29
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ADC ZR, ZR, R7
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// Load yL in R11-R14, yH in R15-19
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// (yH + yL) in R11-R14, destroys yL
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LDP 0(R1), (R11, R12)
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LDP 32(R1), (R15, R16)
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ADDS R15, R11
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ADCS R16, R12
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LDP 16(R1), (R13, R14)
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LDP 48(R1), (R17, R19)
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ADCS R17, R13
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ADCS R19, R14
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ADC ZR, ZR, R8
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// Compute maskes and combined carry
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SUB R7, ZR, R9
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SUB R8, ZR, R10
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AND R8, R7
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// masked(yH + yL)
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AND R9, R11, R15
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AND R9, R12, R16
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AND R9, R13, R17
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AND R9, R14, R19
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// masked(xH + xL)
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AND R10, R25, R20
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AND R10, R26, R21
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AND R10, R27, R22
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AND R10, R29, R23
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// masked(xH + xL) + masked(yH + yL) in R15-R19
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ADDS R20, R15
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ADCS R21, R16
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ADCS R22, R17
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ADCS R23, R19
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ADC ZR, R7
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// Use z as temporary storage
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STP (R25, R26), 0(R2)
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// (xH + xL) * (yH + yL)
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mul256x256karatsuba(0(R2), R25, R26, R27, R29, R11, R12, R13, R14, R8, R9, R10, R20, R21, R22, R23, R24, R0, R1)
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MOVD x+8(FP), R0
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MOVD y+16(FP), R1
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ADDS R21, R15
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ADCS R22, R16
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ADCS R23, R17
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ADCS R24, R19
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ADC ZR, R7
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// Load yL in R11-R14
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LDP 0(R1), (R11, R12)
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LDP 16(R1), (R13, R14)
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// xL * yL
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mul256x256karatsuba(0(R0), R3, R4, R5, R6, R11, R12, R13, R14, R21, R22, R23, R24, R25, R26, R27, R29, R1, R2)
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|
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MOVD z+0(FP), R2
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MOVD y+16(FP), R1
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|
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// (xH + xL) * (yH + yL) - xL * yL
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SUBS R21, R8
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SBCS R22, R9
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STP (R21, R22), 0(R2)
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|
SBCS R23, R10
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|
SBCS R24, R20
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|
STP (R23, R24), 16(R2)
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|
SBCS R25, R15
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|
SBCS R26, R16
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|
SBCS R27, R17
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|
SBCS R29, R19
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|
SBC ZR, R7
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|
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|
// Load xH in R3-R6, yH in R11-R14
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|
LDP 32(R0), (R3, R4)
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LDP 48(R0), (R5, R6)
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LDP 32(R1), (R11, R12)
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LDP 48(R1), (R13, R14)
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|
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ADDS R25, R8
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ADCS R26, R9
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ADCS R27, R10
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|
ADCS R29, R20
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ADC ZR, ZR, R1
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|
|
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MOVD R20, 32(R2)
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|
|
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// xH * yH
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mul256x256karatsuba(32(R0), R3, R4, R5, R6, R11, R12, R13, R14, R21, R22, R23, R24, R25, R26, R27, R29, R2, R20)
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NEG R1, R1
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MOVD z+0(FP), R2
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MOVD 32(R2), R20
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// (xH + xL) * (yH + yL) - xL * yL - xH * yH in R8-R10,R20,R15-R19
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// Store lower half in z, that's done
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SUBS R21, R8
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SBCS R22, R9
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STP (R8, R9), 32(R2)
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SBCS R23, R10
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SBCS R24, R20
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STP (R10, R20), 48(R2)
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SBCS R25, R15
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SBCS R26, R16
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SBCS R27, R17
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SBCS R29, R19
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SBC ZR, R7
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|
|
|
// (xH * yH) * 2^512 + ((xH + xL) * (yH + yL) - xL * yL - xH * yH) * 2^256 + xL * yL
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// Store remaining limbs in z
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ADDS $1, R1
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ADCS R21, R15
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ADCS R22, R16
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STP (R15, R16), 64(R2)
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ADCS R23, R17
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ADCS R24, R19
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STP (R17, R19), 80(R2)
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ADCS R7, R25
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ADCS ZR, R26
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STP (R25, R26), 96(R2)
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ADCS ZR, R27
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ADC ZR, R29
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STP (R27, R29), 112(R2)
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|
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RET
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|
|
// Expects that X0*Y0 is already in Z0(low),Z3(high) and X0*Y1 in Z1(low),Z2(high)
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|
// Z0 is not actually touched
|
|
// Result of (X0-X1) * (Y0-Y3) will be in Z0-Z5
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|
// Inputs remain intact
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|
#define mul128x256comba(X0, X1, Y0, Y1, Y2, Y3, Z0, Z1, Z2, Z3, Z4, Z5, T0, T1, T2, T3)\
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MUL X1, Y0, T0 \
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UMULH X1, Y0, T1 \
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ADDS Z3, Z1 \
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ADC ZR, Z2 \
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\
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MUL X0, Y2, T2 \
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UMULH X0, Y2, T3 \
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|
ADDS T0, Z1 \
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|
ADCS T1, Z2 \
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|
ADC ZR, ZR, Z3 \
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|
\
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MUL X1, Y1, T0 \
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UMULH X1, Y1, T1 \
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|
ADDS T2, Z2 \
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|
ADCS T3, Z3 \
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|
ADC ZR, ZR, Z4 \
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|
\
|
|
MUL X0, Y3, T2 \
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|
UMULH X0, Y3, T3 \
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|
ADDS T0, Z2 \
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|
ADCS T1, Z3 \
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|
ADC ZR, Z4 \
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|
\
|
|
MUL X1, Y2, T0 \
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|
UMULH X1, Y2, T1 \
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|
ADDS T2, Z3 \
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|
ADCS T3, Z4 \
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|
ADC ZR, ZR, Z5 \
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|
\
|
|
MUL X1, Y3, T2 \
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|
UMULH X1, Y3, T3 \
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|
ADDS T0, Z3 \
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|
ADCS T1, Z4 \
|
|
ADC ZR, Z5 \
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|
ADDS T2, Z4 \
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|
ADC T3, Z5
|
|
|
|
// This implements the shifted 2^(B*w) Montgomery reduction from
|
|
// https://eprint.iacr.org/2016/986.pdf with B = 4, w = 64
|
|
TEXT ·rdcP503(SB), NOSPLIT, $0-16
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|
MOVD x+8(FP), R0
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|
|
|
// Load x0-x1
|
|
LDP 0(R0), (R2, R3)
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|
|
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// Load the prime constant in R25-R29
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|
LDP ·P503p1s8+32(SB), (R25, R26)
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|
LDP ·P503p1s8+48(SB), (R27, R29)
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|
|
|
// [x0,x1] * p503p1s8 to R4-R9
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|
MUL R2, R25, R4 // x0 * p503p1s8[0]
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|
UMULH R2, R25, R7
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|
MUL R2, R26, R5 // x0 * p503p1s8[1]
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|
UMULH R2, R26, R6
|
|
|
|
mul128x256comba(R2, R3, R25, R26, R27, R29, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13)
|
|
|
|
LDP 16(R0), (R3, R11) // x2
|
|
LDP 32(R0), (R12, R13)
|
|
LDP 48(R0), (R14, R15)
|
|
|
|
// Left-shift result in R4-R9 by 56 to R4-R10
|
|
ORR R9>>8, ZR, R10
|
|
LSL $56, R9
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|
ORR R8>>8, R9
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|
LSL $56, R8
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|
ORR R7>>8, R8
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|
LSL $56, R7
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|
ORR R6>>8, R7
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|
LSL $56, R6
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|
ORR R5>>8, R6
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|
LSL $56, R5
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|
ORR R4>>8, R5
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|
LSL $56, R4
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|
|
|
ADDS R4, R11 // x3
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|
ADCS R5, R12 // x4
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|
ADCS R6, R13
|
|
ADCS R7, R14
|
|
ADCS R8, R15
|
|
LDP 64(R0), (R16, R17)
|
|
LDP 80(R0), (R19, R20)
|
|
MUL R3, R25, R4 // x2 * p503p1s8[0]
|
|
UMULH R3, R25, R7
|
|
ADCS R9, R16
|
|
ADCS R10, R17
|
|
ADCS ZR, R19
|
|
ADCS ZR, R20
|
|
LDP 96(R0), (R21, R22)
|
|
LDP 112(R0), (R23, R24)
|
|
MUL R3, R26, R5 // x2 * p503p1s8[1]
|
|
UMULH R3, R26, R6
|
|
ADCS ZR, R21
|
|
ADCS ZR, R22
|
|
ADCS ZR, R23
|
|
ADC ZR, R24
|
|
|
|
// [x2,x3] * p503p1s8 to R4-R9
|
|
mul128x256comba(R3, R11, R25, R26, R27, R29, R4, R5, R6, R7, R8, R9, R10, R0, R1, R2)
|
|
|
|
ORR R9>>8, ZR, R10
|
|
LSL $56, R9
|
|
ORR R8>>8, R9
|
|
LSL $56, R8
|
|
ORR R7>>8, R8
|
|
LSL $56, R7
|
|
ORR R6>>8, R7
|
|
LSL $56, R6
|
|
ORR R5>>8, R6
|
|
LSL $56, R5
|
|
ORR R4>>8, R5
|
|
LSL $56, R4
|
|
|
|
ADDS R4, R13 // x5
|
|
ADCS R5, R14 // x6
|
|
ADCS R6, R15
|
|
ADCS R7, R16
|
|
MUL R12, R25, R4 // x4 * p503p1s8[0]
|
|
UMULH R12, R25, R7
|
|
ADCS R8, R17
|
|
ADCS R9, R19
|
|
ADCS R10, R20
|
|
ADCS ZR, R21
|
|
MUL R12, R26, R5 // x4 * p503p1s8[1]
|
|
UMULH R12, R26, R6
|
|
ADCS ZR, R22
|
|
ADCS ZR, R23
|
|
ADC ZR, R24
|
|
|
|
// [x4,x5] * p503p1s8 to R4-R9
|
|
mul128x256comba(R12, R13, R25, R26, R27, R29, R4, R5, R6, R7, R8, R9, R10, R0, R1, R2)
|
|
|
|
ORR R9>>8, ZR, R10
|
|
LSL $56, R9
|
|
ORR R8>>8, R9
|
|
LSL $56, R8
|
|
ORR R7>>8, R8
|
|
LSL $56, R7
|
|
ORR R6>>8, R7
|
|
LSL $56, R6
|
|
ORR R5>>8, R6
|
|
LSL $56, R5
|
|
ORR R4>>8, R5
|
|
LSL $56, R4
|
|
|
|
ADDS R4, R15 // x7
|
|
ADCS R5, R16 // x8
|
|
ADCS R6, R17
|
|
ADCS R7, R19
|
|
MUL R14, R25, R4 // x6 * p503p1s8[0]
|
|
UMULH R14, R25, R7
|
|
ADCS R8, R20
|
|
ADCS R9, R21
|
|
ADCS R10, R22
|
|
MUL R14, R26, R5 // x6 * p503p1s8[1]
|
|
UMULH R14, R26, R6
|
|
ADCS ZR, R23
|
|
ADC ZR, R24
|
|
|
|
// [x6,x7] * p503p1s8 to R4-R9
|
|
mul128x256comba(R14, R15, R25, R26, R27, R29, R4, R5, R6, R7, R8, R9, R10, R0, R1, R2)
|
|
|
|
ORR R9>>8, ZR, R10
|
|
LSL $56, R9
|
|
ORR R8>>8, R9
|
|
LSL $56, R8
|
|
ORR R7>>8, R8
|
|
LSL $56, R7
|
|
ORR R6>>8, R7
|
|
LSL $56, R6
|
|
ORR R5>>8, R6
|
|
LSL $56, R5
|
|
ORR R4>>8, R5
|
|
LSL $56, R4
|
|
|
|
MOVD z+0(FP), R0
|
|
ADDS R4, R17
|
|
ADCS R5, R19
|
|
STP (R16, R17), 0(R0) // Store final result to z
|
|
ADCS R6, R20
|
|
ADCS R7, R21
|
|
STP (R19, R20), 16(R0)
|
|
ADCS R8, R22
|
|
ADCS R9, R23
|
|
STP (R21, R22), 32(R0)
|
|
ADC R10, R24
|
|
STP (R23, R24), 48(R0)
|
|
|
|
RET
|
|
|
|
TEXT ·modP503(SB), NOSPLIT, $0-8
|
|
MOVD x+0(FP), R0
|
|
|
|
// Keep x in R1-R8, p503 in R9-R14, subtract to R1-R8
|
|
LDP ·P503+16(SB), (R9, R10)
|
|
LDP 0(R0), (R1, R2)
|
|
LDP 16(R0), (R3, R4)
|
|
SUBS R9, R1
|
|
SBCS R9, R2
|
|
|
|
LDP 32(R0), (R5, R6)
|
|
LDP ·P503+32(SB), (R11, R12)
|
|
SBCS R9, R3
|
|
SBCS R10, R4
|
|
|
|
LDP 48(R0), (R7, R8)
|
|
LDP ·P503+48(SB), (R13, R14)
|
|
SBCS R11, R5
|
|
SBCS R12, R6
|
|
|
|
SBCS R13, R7
|
|
SBCS R14, R8
|
|
SBC ZR, ZR, R15
|
|
|
|
// Mask with the borrow and add p503
|
|
AND R15, R9
|
|
AND R15, R10
|
|
AND R15, R11
|
|
AND R15, R12
|
|
AND R15, R13
|
|
AND R15, R14
|
|
|
|
ADDS R9, R1
|
|
ADCS R9, R2
|
|
STP (R1, R2), 0(R0)
|
|
ADCS R9, R3
|
|
ADCS R10, R4
|
|
STP (R3, R4), 16(R0)
|
|
ADCS R11, R5
|
|
ADCS R12, R6
|
|
STP (R5, R6), 32(R0)
|
|
ADCS R13, R7
|
|
ADCS R14, R8
|
|
STP (R7, R8), 48(R0)
|
|
|
|
RET
|