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@@ -108,7 +108,7 @@ |
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// Input: I0 and I1. |
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// Output: O |
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// All the other arguments resgisters are used for storing temporary values |
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#define MULS256_MULXADX(O, I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \ |
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#define MULS256_MULX_ADCX_ADOX(O, I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \ |
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\ // U0[0] |
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MOVQ 0+I0, DX \ // MULX requires multiplayer in DX |
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\ // T0:T1 = I1*DX |
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@@ -230,7 +230,7 @@ |
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MULS_128x320(I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, ADDQ, ADDQ, ADCQ, ADCQ) |
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// Multiplies 128-bit with 320-bit integer. Optimized with MULX, ADOX and ADCX instructions |
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#define MULS_128x320_MULXADX(I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \ |
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#define MULS_128x320_MULX_ADCX_ADOX(I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9) \ |
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MULS_128x320(I0, I1, T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, ADOXQ, ADCXQ, ADOXQ, ADCXQ) |
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// Template of a macro performing multiplication of two 512-bit numbers. It uses one |
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@@ -238,7 +238,7 @@ |
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// customized with macro performing schoolbook multiplication. |
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// Input: |
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// * I0, I1 - two 512-bit numbers |
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// * MULS - either MULS256_MULX or MULS256_MULXADX |
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// * MULS - either MULS256_MULX or MULS256_MULX_ADCX_ADOX |
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// Output: OUT - 1024-bit long |
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#define MUL(OUT, I0, I1, MULS) \ |
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\ // R[8-11]: U1+U0 |
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@@ -358,7 +358,7 @@ |
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// R[8-15], BX, CX |
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// Input: |
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// * IN: 1024-bit number to be reduced |
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// * MULS: either MULS_128x320_MULX or MULS_128x320_MULXADX |
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// * MULS: either MULS_128x320_MULX or MULS_128x320_MULX_ADCX_ADOX |
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// Output: OUT 512-bit |
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#define REDC(OUT, IN, MULS) \ |
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MULS(0(IN), ·p503p1, R8, R9, R10, R11, R12, R13, R14, BX, CX, R15) \ |
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@@ -1181,7 +1181,7 @@ TEXT ·fp503Mul(SB), NOSPLIT, $104-24 |
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mul_with_mulx_adcx_adox: |
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// Mul implementation for CPUs supporting two independent carry chain |
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// (ADOX/ADCX) instructions and carry-less MULX multiplier |
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MUL(CX, REG_P1, REG_P2, MULS256_MULXADX) |
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MUL(CX, REG_P1, REG_P2, MULS256_MULX_ADCX_ADOX) |
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RET |
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mul_with_mulx: |
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@@ -1507,7 +1507,7 @@ redc_with_mulx_adcx_adox: |
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// Implementation of the Montgomery reduction for CPUs |
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// supporting two independent carry chain (ADOX/ADCX) |
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// instructions and carry-less MULX multiplier |
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REDC(REG_P2, REG_P1, MULS_128x320_MULXADX) |
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REDC(REG_P2, REG_P1, MULS_128x320_MULX_ADCX_ADOX) |
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RET |
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redc_with_mulx: |
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