2014-07-14 23:28:14 +01:00
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/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
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* All rights reserved.
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*
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* This package is an SSL implementation written
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* by Eric Young (eay@cryptsoft.com).
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* The implementation was written so as to conform with Netscapes SSL.
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*
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* This library is free for commercial and non-commercial use as long as
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* the following conditions are aheared to. The following conditions
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* apply to all code found in this distribution, be it the RC4, RSA,
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* lhash, DES, etc., code; not just the SSL code. The SSL documentation
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* included with this distribution is covered by the same copyright terms
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* except that the holder is Tim Hudson (tjh@cryptsoft.com).
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*
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* Copyright remains Eric Young's, and as such any Copyright notices in
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* the code are not to be removed.
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* If this package is used in a product, Eric Young should be given attribution
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* as the author of the parts of the library used.
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* This can be in the form of a textual message at program startup or
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* in documentation (online or textual) provided with the package.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* "This product includes cryptographic software written by
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* Eric Young (eay@cryptsoft.com)"
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* The word 'cryptographic' can be left out if the rouines from the library
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* being used are not cryptographic related :-).
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* 4. If you include any Windows specific code (or a derivative thereof) from
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* the apps directory (application code) you must include an acknowledgement:
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* "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
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*
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* THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* The licence and distribution terms for any publically available version or
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* derivative of this code cannot be changed. i.e. this code cannot simply be
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* copied and put under another distribution licence
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* [including the GNU Public Licence.]
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*
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* This product includes cryptographic software written by Eric Young
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* (eay@cryptsoft.com). This product includes software written by Tim
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* Hudson (tjh@cryptsoft.com). */
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#ifndef OPENSSL_HEADER_CPU_H
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#define OPENSSL_HEADER_CPU_H
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#include <openssl/base.h>
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#if defined(__cplusplus)
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extern "C" {
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#endif
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2014-12-26 05:54:52 +00:00
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/* Runtime CPU feature support */
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2014-07-14 23:28:14 +01:00
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#if defined(OPENSSL_X86) || defined(OPENSSL_X86_64)
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/* OPENSSL_ia32cap_P contains the Intel CPUID bits when running on an x86 or
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* x86-64 system.
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*
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* Index 0:
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* EDX for CPUID where EAX = 1
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2015-07-11 14:46:55 +01:00
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* Bit 20 is always zero
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* Bit 28 is adjusted to reflect whether the data cache is shared between
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* multiple logical cores
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2014-07-14 23:28:14 +01:00
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* Bit 30 is used to indicate an Intel CPU
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* Index 1:
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* ECX for CPUID where EAX = 1
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2015-07-11 14:46:55 +01:00
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* Bit 11 is used to indicate AMD XOP support, not SDBG
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2014-07-14 23:28:14 +01:00
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* Index 2:
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2014-08-20 19:19:54 +01:00
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* EBX for CPUID where EAX = 7
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2015-07-11 14:46:55 +01:00
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* Index 3 is set to zero.
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2014-08-20 19:19:54 +01:00
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*
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* Note: the CPUID bits are pre-adjusted for the OSXSAVE bit and the YMM and XMM
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Replace cpuid assembly with C code.
Rather, take a leaf out of Chromium's book and use MSVC's __cpuid and
_xgetbv built-in, with an inline assembly emulated version for other
compilers.
This preserves the behavior of the original assembly with the following
differences:
- CPUs without cpuid aren't support. Chromium's base/cpu.cc doesn't
check, and SSE2 support is part of our baseline; the perlasm code
is always built with OPENSSL_IA32_SSE2.
- The clear_xmm block in cpu-x86-asm.pl is removed. This was used to
clear some XMM-using features if OSXSAVE was set but XCR0 reports the
OS doesn't use XSAVE to store SSE state. This wasn't present in the
x86_64 and seems wrong. Section 13.5.2 of the Intel manual, volume 1,
explicitly says SSE may still be used in this case; the OS may save
that state in FXSAVE instead. A side discussion on upstream's RT#2633
agrees.
- The old code ran some AMD CPUs through the "intel" codepath and some
went straight to "generic" after duplicating some, but not all, logic.
The AMD copy didn't clear some reserved bits and didn't query CPUID 7
for AVX2 support. This is moot since AMD CPUs today don't support
AVX2, but it seems they're expected to in the future?
- Setting bit 10 is dropped. This doesn't appear to be queried anywhere,
was 32-bit only, and seems a remnant of upstream's
14e21f863a3e3278bb8660ea9844e92e52e1f2f7.
Change-Id: I0548877c97e997f7beb25e15f3fea71c68a951d2
Reviewed-on: https://boringssl-review.googlesource.com/5434
Reviewed-by: Adam Langley <agl@google.com>
2015-07-11 14:47:14 +01:00
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* bits in XCR0, so it is not necessary to check those. */
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2014-07-14 23:28:14 +01:00
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extern uint32_t OPENSSL_ia32cap_P[4];
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2017-04-25 20:37:53 +01:00
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#if defined(BORINGSSL_FIPS)
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const uint32_t *OPENSSL_ia32cap_get(void);
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#else
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static inline const uint32_t *OPENSSL_ia32cap_get(void) {
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return OPENSSL_ia32cap_P;
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}
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#endif
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2014-07-14 23:28:14 +01:00
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#endif
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2015-01-09 23:44:37 +00:00
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#if defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64)
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2015-10-16 23:46:46 +01:00
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2015-10-28 16:40:12 +00:00
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#if defined(OPENSSL_APPLE)
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/* iOS builds use the static ARM configuration. */
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#define OPENSSL_STATIC_ARMCAP
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#endif
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2015-10-16 23:46:46 +01:00
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#if !defined(OPENSSL_STATIC_ARMCAP)
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2015-11-17 23:25:00 +00:00
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/* CRYPTO_is_NEON_capable_at_runtime returns true if the current CPU has a NEON
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* unit. Note that |OPENSSL_armcap_P| also exists and contains the same
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* information in a form that's easier for assembly to use. */
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OPENSSL_EXPORT char CRYPTO_is_NEON_capable_at_runtime(void);
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/* CRYPTO_is_NEON_capable returns true if the current CPU has a NEON unit. If
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* this is known statically then it returns one immediately. */
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static inline int CRYPTO_is_NEON_capable(void) {
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2016-04-28 17:17:55 +01:00
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/* Only statically skip the runtime lookup on aarch64. On arm, one CPU is
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* known to have a broken NEON unit which is known to fail with on some
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* hand-written NEON assembly. For now, continue to apply the workaround even
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* when the compiler is instructed to freely emit NEON code. See
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* https://crbug.com/341598 and https://crbug.com/606629. */
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#if defined(__ARM_NEON__) && !defined(OPENSSL_ARM)
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2015-11-17 23:25:00 +00:00
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return 1;
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#else
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return CRYPTO_is_NEON_capable_at_runtime();
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#endif
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}
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2014-07-14 23:28:14 +01:00
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2016-04-28 17:17:55 +01:00
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#if defined(OPENSSL_ARM)
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/* CRYPTO_has_broken_NEON returns one if the current CPU is known to have a
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* broken NEON unit. See https://crbug.com/341598. */
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OPENSSL_EXPORT int CRYPTO_has_broken_NEON(void);
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#endif
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2015-10-16 23:46:46 +01:00
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/* CRYPTO_is_ARMv8_AES_capable returns true if the current CPU supports the
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* ARMv8 AES instruction. */
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int CRYPTO_is_ARMv8_AES_capable(void);
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/* CRYPTO_is_ARMv8_PMULL_capable returns true if the current CPU supports the
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* ARMv8 PMULL instruction. */
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int CRYPTO_is_ARMv8_PMULL_capable(void);
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#else
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static inline int CRYPTO_is_NEON_capable(void) {
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#if defined(OPENSSL_STATIC_ARMCAP_NEON) || defined(__ARM_NEON__)
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return 1;
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#else
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return 0;
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#endif
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}
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static inline int CRYPTO_is_ARMv8_AES_capable(void) {
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#if defined(OPENSSL_STATIC_ARMCAP_AES)
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return 1;
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#else
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return 0;
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#endif
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}
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static inline int CRYPTO_is_ARMv8_PMULL_capable(void) {
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#if defined(OPENSSL_STATIC_ARMCAP_PMULL)
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return 1;
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#else
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return 0;
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#endif
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}
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#endif /* OPENSSL_STATIC_ARMCAP */
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2016-04-28 17:17:55 +01:00
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#endif /* OPENSSL_ARM || OPENSSL_AARCH64 */
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2014-07-14 23:28:14 +01:00
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2016-09-23 20:47:24 +01:00
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#if defined(OPENSSL_PPC64LE)
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/* CRYPTO_is_PPC64LE_vcrypto_capable returns true iff the current CPU supports
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* the Vector.AES category of instructions. */
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int CRYPTO_is_PPC64LE_vcrypto_capable(void);
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2017-04-04 19:08:28 +01:00
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extern unsigned long OPENSSL_ppc64le_hwcap2;
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2016-09-23 20:47:24 +01:00
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#endif /* OPENSSL_PPC64LE */
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2014-07-14 23:28:14 +01:00
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#if defined(__cplusplus)
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} /* extern C */
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#endif
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#endif /* OPENSSL_HEADER_CPU_H */
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