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boringssl/crypto/cpu-arm.c

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Use a weak pointer for getauxval. The Android SDK version against which Chromium builds is too old to include sys/auxv.h. This change switches the ARM code to use a weak pointer for getauxval and to hard code the aux value numbers. It also switches the license on cpu-arm.c because there's no OpenSSL left in there now. Change-Id: I440cb9d533a06d8b245b189d8e5148fa33e29412 Reviewed-on: https://boringssl-review.googlesource.com/2880 Reviewed-by: David Benjamin <davidben@chromium.org> Reviewed-by: Adam Langley <agl@google.com>
2015-01-15 00:37:38 +00:00
/* Copyright (c) 2014, Google Inc.
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
*
Use a weak pointer for getauxval. The Android SDK version against which Chromium builds is too old to include sys/auxv.h. This change switches the ARM code to use a weak pointer for getauxval and to hard code the aux value numbers. It also switches the license on cpu-arm.c because there's no OpenSSL left in there now. Change-Id: I440cb9d533a06d8b245b189d8e5148fa33e29412 Reviewed-on: https://boringssl-review.googlesource.com/2880 Reviewed-by: David Benjamin <davidben@chromium.org> Reviewed-by: Adam Langley <agl@google.com>
2015-01-15 00:37:38 +00:00
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
*
Use a weak pointer for getauxval. The Android SDK version against which Chromium builds is too old to include sys/auxv.h. This change switches the ARM code to use a weak pointer for getauxval and to hard code the aux value numbers. It also switches the license on cpu-arm.c because there's no OpenSSL left in there now. Change-Id: I440cb9d533a06d8b245b189d8e5148fa33e29412 Reviewed-on: https://boringssl-review.googlesource.com/2880 Reviewed-by: David Benjamin <davidben@chromium.org> Reviewed-by: Adam Langley <agl@google.com>
2015-01-15 00:37:38 +00:00
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
#include <openssl/cpu.h>
aarch64 support. This is an initial cut at aarch64 support. I have only qemu to test it however—hopefully hardware will be coming soon. This also affects 32-bit ARM in that aarch64 chips can run 32-bit code and we would like to be able to take advantage of the crypto operations even in 32-bit mode. AES and GHASH should Just Work in this case: the -armx.pl files can be built for either 32- or 64-bit mode based on the flavour argument given to the Perl script. SHA-1 and SHA-256 don't work like this however because they've never support for multiple implementations, thus BoringSSL built for 32-bit won't use the SHA instructions on an aarch64 chip. No dedicated ChaCha20 or Poly1305 support yet. Change-Id: Ib275bc4894a365c8ec7c42f4e91af6dba3bd686c Reviewed-on: https://boringssl-review.googlesource.com/2801 Reviewed-by: Adam Langley <agl@google.com>
2015-01-09 23:44:37 +00:00
#if defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64)
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
#include <inttypes.h>
aarch64 support. This is an initial cut at aarch64 support. I have only qemu to test it however—hopefully hardware will be coming soon. This also affects 32-bit ARM in that aarch64 chips can run 32-bit code and we would like to be able to take advantage of the crypto operations even in 32-bit mode. AES and GHASH should Just Work in this case: the -armx.pl files can be built for either 32- or 64-bit mode based on the flavour argument given to the Perl script. SHA-1 and SHA-256 don't work like this however because they've never support for multiple implementations, thus BoringSSL built for 32-bit won't use the SHA instructions on an aarch64 chip. No dedicated ChaCha20 or Poly1305 support yet. Change-Id: Ib275bc4894a365c8ec7c42f4e91af6dba3bd686c Reviewed-on: https://boringssl-review.googlesource.com/2801 Reviewed-by: Adam Langley <agl@google.com>
2015-01-09 23:44:37 +00:00
#include <stdio.h>
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
#include "arm_arch.h"
Use a weak pointer for getauxval. The Android SDK version against which Chromium builds is too old to include sys/auxv.h. This change switches the ARM code to use a weak pointer for getauxval and to hard code the aux value numbers. It also switches the license on cpu-arm.c because there's no OpenSSL left in there now. Change-Id: I440cb9d533a06d8b245b189d8e5148fa33e29412 Reviewed-on: https://boringssl-review.googlesource.com/2880 Reviewed-by: David Benjamin <davidben@chromium.org> Reviewed-by: Adam Langley <agl@google.com>
2015-01-15 00:37:38 +00:00
/* We can't include <sys/auxv.h> because the Android SDK version against which
* Chromium builds is too old to have it. Instead we define all the constants
* that we need and have a weak pointer to getauxval. */
unsigned long getauxval(unsigned long type) __attribute__((weak));
static const unsigned long AT_HWCAP = 16;
static const unsigned long AT_HWCAP2 = 26;
Convert all zero-argument functions to '(void)' Otherwise, in C, it becomes a K&R function declaration which doesn't actually type-check the number of arguments. Change-Id: I0731a9fefca46fb1c266bfb1c33d464cf451a22e Reviewed-on: https://boringssl-review.googlesource.com/1582 Reviewed-by: Adam Langley <agl@google.com>
2014-08-20 21:24:00 +01:00
char CRYPTO_is_NEON_capable(void) {
Inital import. Initial fork from f2d678e6e89b6508147086610e985d4e8416e867 (1.0.2 beta). (This change contains substantial changes from the original and effectively starts a new history.)
2014-06-20 20:00:00 +01:00
return (OPENSSL_armcap_P & ARMV7_NEON) != 0;
}
void CRYPTO_set_NEON_capable(char neon_capable) {
if (neon_capable) {
OPENSSL_armcap_P |= ARMV7_NEON;
} else {
OPENSSL_armcap_P &= ~ARMV7_NEON;
}
}
Convert all zero-argument functions to '(void)' Otherwise, in C, it becomes a K&R function declaration which doesn't actually type-check the number of arguments. Change-Id: I0731a9fefca46fb1c266bfb1c33d464cf451a22e Reviewed-on: https://boringssl-review.googlesource.com/1582 Reviewed-by: Adam Langley <agl@google.com>
2014-08-20 21:24:00 +01:00
char CRYPTO_is_NEON_functional(void) {
Add a control to disable the Poly1305 NEON code. Some phones have a buggy NEON unit and the Poly1305 NEON code fails on them, even though other NEON code appears to work fine. This change: 1) Fixes a bug where NEON was assumed even when the code wasn't compiled in NEON mode. 2) Adds a second NEON control bit that can be disabled in order to run NEON code, but not the Poly1305 NEON code. https://code.google.com/p/chromium/issues/detail?id=341598 Change-Id: Icb121bf8dba47c7a46c7667f676ff7a4bc973625 Reviewed-on: https://boringssl-review.googlesource.com/1351 Reviewed-by: Adam Langley <agl@google.com>
2014-07-31 20:16:48 +01:00
static const uint32_t kWantFlags = ARMV7_NEON | ARMV7_NEON_FUNCTIONAL;
return (OPENSSL_armcap_P & kWantFlags) == kWantFlags;
}
void CRYPTO_set_NEON_functional(char neon_functional) {
if (neon_functional) {
OPENSSL_armcap_P |= ARMV7_NEON_FUNCTIONAL;
} else {
OPENSSL_armcap_P &= ~ARMV7_NEON_FUNCTIONAL;
}
}
aarch64 support. This is an initial cut at aarch64 support. I have only qemu to test it however—hopefully hardware will be coming soon. This also affects 32-bit ARM in that aarch64 chips can run 32-bit code and we would like to be able to take advantage of the crypto operations even in 32-bit mode. AES and GHASH should Just Work in this case: the -armx.pl files can be built for either 32- or 64-bit mode based on the flavour argument given to the Perl script. SHA-1 and SHA-256 don't work like this however because they've never support for multiple implementations, thus BoringSSL built for 32-bit won't use the SHA instructions on an aarch64 chip. No dedicated ChaCha20 or Poly1305 support yet. Change-Id: Ib275bc4894a365c8ec7c42f4e91af6dba3bd686c Reviewed-on: https://boringssl-review.googlesource.com/2801 Reviewed-by: Adam Langley <agl@google.com>
2015-01-09 23:44:37 +00:00
void OPENSSL_cpuid_setup(void) {
Use a weak pointer for getauxval. The Android SDK version against which Chromium builds is too old to include sys/auxv.h. This change switches the ARM code to use a weak pointer for getauxval and to hard code the aux value numbers. It also switches the license on cpu-arm.c because there's no OpenSSL left in there now. Change-Id: I440cb9d533a06d8b245b189d8e5148fa33e29412 Reviewed-on: https://boringssl-review.googlesource.com/2880 Reviewed-by: David Benjamin <davidben@chromium.org> Reviewed-by: Adam Langley <agl@google.com>
2015-01-15 00:37:38 +00:00
if (getauxval == NULL) {
return;
}
aarch64 support. This is an initial cut at aarch64 support. I have only qemu to test it however—hopefully hardware will be coming soon. This also affects 32-bit ARM in that aarch64 chips can run 32-bit code and we would like to be able to take advantage of the crypto operations even in 32-bit mode. AES and GHASH should Just Work in this case: the -armx.pl files can be built for either 32- or 64-bit mode based on the flavour argument given to the Perl script. SHA-1 and SHA-256 don't work like this however because they've never support for multiple implementations, thus BoringSSL built for 32-bit won't use the SHA instructions on an aarch64 chip. No dedicated ChaCha20 or Poly1305 support yet. Change-Id: Ib275bc4894a365c8ec7c42f4e91af6dba3bd686c Reviewed-on: https://boringssl-review.googlesource.com/2801 Reviewed-by: Adam Langley <agl@google.com>
2015-01-09 23:44:37 +00:00
unsigned long hwcap = getauxval(AT_HWCAP);
#if defined(OPENSSL_ARM)
static const unsigned long kNEON = 1 << 12;
if ((hwcap & kNEON) == 0) {
return;
}
/* In 32-bit mode, the ARMv8 feature bits are in a different aux vector
* value. */
hwcap = getauxval(AT_HWCAP2);
/* See /usr/include/asm/hwcap.h on an ARM installation for the source of
* these values. */
static const unsigned long kAES = 1 << 0;
static const unsigned long kPMULL = 1 << 1;
static const unsigned long kSHA1 = 1 << 2;
static const unsigned long kSHA256 = 1 << 3;
#elif defined(OPENSSL_AARCH64)
/* See /usr/include/asm/hwcap.h on an aarch64 installation for the source of
* these values. */
static const unsigned long kNEON = 1 << 1;
static const unsigned long kAES = 1 << 3;
static const unsigned long kPMULL = 1 << 4;
static const unsigned long kSHA1 = 1 << 5;
static const unsigned long kSHA256 = 1 << 6;
if ((hwcap & kNEON) == 0) {
return;
}
#endif
OPENSSL_armcap_P |= ARMV7_NEON | ARMV7_NEON_FUNCTIONAL;
if (hwcap & kAES) {
OPENSSL_armcap_P |= ARMV8_AES;
}
if (hwcap & kPMULL) {
OPENSSL_armcap_P |= ARMV8_PMULL;
}
if (hwcap & kSHA1) {
OPENSSL_armcap_P |= ARMV8_SHA1;
}
if (hwcap & kSHA256) {
OPENSSL_armcap_P |= ARMV8_SHA256;
}
}
#endif /* defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64) */
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