2017-06-12 23:53:40 +01:00
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#! /usr/bin/env perl
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# Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the OpenSSL license (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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2015-01-09 23:44:37 +00:00
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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#
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# SHA1 for ARMv8.
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#
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# Performance in cycles per processed byte and improvement coefficient
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# over code generated with "default" compiler:
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#
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# hardware-assisted software(*)
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# Apple A7 2.31 4.13 (+14%)
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2015-04-20 22:40:54 +01:00
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# Cortex-A53 2.24 8.03 (+97%)
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2015-01-09 23:44:37 +00:00
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# Cortex-A57 2.35 7.88 (+74%)
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2015-04-20 22:41:45 +01:00
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# Denver 2.13 3.97 (+0%)(**)
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# X-Gene 8.80 (+200%)
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2017-06-12 23:53:40 +01:00
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# Mongoose 2.05 6.50 (+160%)
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2018-02-02 20:12:22 +00:00
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# Kryo 1.88 8.00 (+90%)
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2015-01-09 23:44:37 +00:00
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#
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# (*) Software results are presented mostly for reference purposes.
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2015-04-20 22:41:45 +01:00
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# (**) Keep in mind that Denver relies on binary translation, which
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# optimizes compiler output at run-time.
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2015-01-09 23:44:37 +00:00
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$flavour = shift;
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2015-04-20 18:25:46 +01:00
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$output = shift;
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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2017-04-04 22:21:43 +01:00
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( $xlate="${dir}../../../perlasm/arm-xlate.pl" and -f $xlate) or
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2015-04-20 18:25:46 +01:00
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die "can't locate arm-xlate.pl";
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open OUT,"| \"$^X\" $xlate $flavour $output";
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*STDOUT=*OUT;
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2015-01-09 23:44:37 +00:00
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($ctx,$inp,$num)=("x0","x1","x2");
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@Xw=map("w$_",(3..17,19));
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@Xx=map("x$_",(3..17,19));
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@V=($A,$B,$C,$D,$E)=map("w$_",(20..24));
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($t0,$t1,$t2,$K)=map("w$_",(25..28));
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sub BODY_00_19 {
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my ($i,$a,$b,$c,$d,$e)=@_;
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my $j=($i+2)&15;
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$code.=<<___ if ($i<15 && !($i&1));
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lsr @Xx[$i+1],@Xx[$i],#32
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___
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$code.=<<___ if ($i<14 && !($i&1));
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ldr @Xx[$i+2],[$inp,#`($i+2)*4-64`]
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___
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$code.=<<___ if ($i<14 && ($i&1));
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#ifdef __ARMEB__
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ror @Xx[$i+1],@Xx[$i+1],#32
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#else
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rev32 @Xx[$i+1],@Xx[$i+1]
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#endif
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___
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$code.=<<___ if ($i<14);
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bic $t0,$d,$b
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and $t1,$c,$b
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ror $t2,$a,#27
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add $d,$d,$K // future e+=K
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orr $t0,$t0,$t1
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add $e,$e,$t2 // e+=rot(a,5)
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ror $b,$b,#2
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add $d,$d,@Xw[($i+1)&15] // future e+=X[i]
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add $e,$e,$t0 // e+=F(b,c,d)
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___
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$code.=<<___ if ($i==19);
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movz $K,#0xeba1
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movk $K,#0x6ed9,lsl#16
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___
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$code.=<<___ if ($i>=14);
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eor @Xw[$j],@Xw[$j],@Xw[($j+2)&15]
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bic $t0,$d,$b
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and $t1,$c,$b
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ror $t2,$a,#27
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eor @Xw[$j],@Xw[$j],@Xw[($j+8)&15]
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add $d,$d,$K // future e+=K
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orr $t0,$t0,$t1
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add $e,$e,$t2 // e+=rot(a,5)
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eor @Xw[$j],@Xw[$j],@Xw[($j+13)&15]
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ror $b,$b,#2
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add $d,$d,@Xw[($i+1)&15] // future e+=X[i]
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add $e,$e,$t0 // e+=F(b,c,d)
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ror @Xw[$j],@Xw[$j],#31
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___
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}
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sub BODY_40_59 {
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my ($i,$a,$b,$c,$d,$e)=@_;
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my $j=($i+2)&15;
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$code.=<<___ if ($i==59);
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movz $K,#0xc1d6
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movk $K,#0xca62,lsl#16
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___
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$code.=<<___;
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orr $t0,$b,$c
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and $t1,$b,$c
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eor @Xw[$j],@Xw[$j],@Xw[($j+2)&15]
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ror $t2,$a,#27
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and $t0,$t0,$d
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add $d,$d,$K // future e+=K
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eor @Xw[$j],@Xw[$j],@Xw[($j+8)&15]
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add $e,$e,$t2 // e+=rot(a,5)
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orr $t0,$t0,$t1
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ror $b,$b,#2
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eor @Xw[$j],@Xw[$j],@Xw[($j+13)&15]
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add $d,$d,@Xw[($i+1)&15] // future e+=X[i]
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add $e,$e,$t0 // e+=F(b,c,d)
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ror @Xw[$j],@Xw[$j],#31
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___
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}
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sub BODY_20_39 {
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my ($i,$a,$b,$c,$d,$e)=@_;
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my $j=($i+2)&15;
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$code.=<<___ if ($i==39);
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movz $K,#0xbcdc
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movk $K,#0x8f1b,lsl#16
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___
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$code.=<<___ if ($i<78);
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eor @Xw[$j],@Xw[$j],@Xw[($j+2)&15]
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eor $t0,$d,$b
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ror $t2,$a,#27
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add $d,$d,$K // future e+=K
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eor @Xw[$j],@Xw[$j],@Xw[($j+8)&15]
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eor $t0,$t0,$c
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add $e,$e,$t2 // e+=rot(a,5)
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ror $b,$b,#2
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eor @Xw[$j],@Xw[$j],@Xw[($j+13)&15]
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add $d,$d,@Xw[($i+1)&15] // future e+=X[i]
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add $e,$e,$t0 // e+=F(b,c,d)
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ror @Xw[$j],@Xw[$j],#31
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___
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$code.=<<___ if ($i==78);
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ldp @Xw[1],@Xw[2],[$ctx]
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eor $t0,$d,$b
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ror $t2,$a,#27
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add $d,$d,$K // future e+=K
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eor $t0,$t0,$c
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add $e,$e,$t2 // e+=rot(a,5)
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ror $b,$b,#2
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add $d,$d,@Xw[($i+1)&15] // future e+=X[i]
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add $e,$e,$t0 // e+=F(b,c,d)
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___
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$code.=<<___ if ($i==79);
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ldp @Xw[3],@Xw[4],[$ctx,#8]
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eor $t0,$d,$b
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ror $t2,$a,#27
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eor $t0,$t0,$c
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add $e,$e,$t2 // e+=rot(a,5)
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ror $b,$b,#2
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ldr @Xw[5],[$ctx,#16]
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add $e,$e,$t0 // e+=F(b,c,d)
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___
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}
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$code.=<<___;
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2015-08-25 02:03:17 +01:00
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#include <openssl/arm_arch.h>
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2015-01-09 23:44:37 +00:00
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.text
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2015-04-20 18:25:46 +01:00
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.extern OPENSSL_armcap_P
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2015-01-09 23:44:37 +00:00
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.globl sha1_block_data_order
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.type sha1_block_data_order,%function
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.align 6
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sha1_block_data_order:
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Support execute-only memory for AArch64 assembly.
Put data in .rodata and, rather than adr, use the combination of adrp :pg_hi21:
and add :lo12:. Unfortunately, iOS uses different syntax, so we must add more
transforms to arm-xlate.pl.
Tested manually by:
1. Use Android NDK r19-beta1
2. Follow usual instructions to configure CMake for aarch64, but pass
-DCMAKE_EXE_LINKER_FLAGS="-fuse-ld=lld -Wl,-execute-only".
3. Build. Confirm with readelf -l tool/bssl that .text is not marked
readable.
4. Push the test binaries onto a Pixel 3. Test normally and with
--cpu={none,neon,crypto}. I had to pass --gtest_filter=-*Thread* to
crypto_test. There appears to be an issue with some runtime function
that's unrelated to our assembly.
No measurable performance difference.
Going forward, to support this, we will need to apply similar changes to
all other AArch64 assembly. This is relatively straightforward, but may
be a little finicky for dual-AArch32/AArch64 files (aesv8-armx.pl).
Update-Note: Assembly syntax is a mess. There's a decent chance some
assembler will get offend.
Change-Id: Ib59b921d4cce76584320fefd23e6bb7ebd4847eb
Reviewed-on: https://boringssl-review.googlesource.com/c/33245
Reviewed-by: Adam Langley <agl@google.com>
Commit-Queue: David Benjamin <davidben@google.com>
2018-11-16 21:34:05 +00:00
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adrp x16,:pg_hi21:OPENSSL_armcap_P
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add x16,x16,:lo12:OPENSSL_armcap_P
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2015-01-09 23:44:37 +00:00
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ldr w16,[x16]
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tst w16,#ARMV8_SHA1
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b.ne .Lv8_entry
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stp x29,x30,[sp,#-96]!
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add x29,sp,#0
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stp x19,x20,[sp,#16]
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stp x21,x22,[sp,#32]
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stp x23,x24,[sp,#48]
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stp x25,x26,[sp,#64]
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stp x27,x28,[sp,#80]
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ldp $A,$B,[$ctx]
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ldp $C,$D,[$ctx,#8]
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ldr $E,[$ctx,#16]
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.Loop:
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ldr @Xx[0],[$inp],#64
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movz $K,#0x7999
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sub $num,$num,#1
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movk $K,#0x5a82,lsl#16
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#ifdef __ARMEB__
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ror $Xx[0],@Xx[0],#32
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#else
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rev32 @Xx[0],@Xx[0]
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#endif
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add $E,$E,$K // warm it up
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add $E,$E,@Xw[0]
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___
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for($i=0;$i<20;$i++) { &BODY_00_19($i,@V); unshift(@V,pop(@V)); }
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for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
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for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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$code.=<<___;
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add $B,$B,@Xw[2]
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add $C,$C,@Xw[3]
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add $A,$A,@Xw[1]
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add $D,$D,@Xw[4]
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add $E,$E,@Xw[5]
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stp $A,$B,[$ctx]
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stp $C,$D,[$ctx,#8]
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str $E,[$ctx,#16]
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cbnz $num,.Loop
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ldp x19,x20,[sp,#16]
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ldp x21,x22,[sp,#32]
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ldp x23,x24,[sp,#48]
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ldp x25,x26,[sp,#64]
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ldp x27,x28,[sp,#80]
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ldr x29,[sp],#96
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ret
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.size sha1_block_data_order,.-sha1_block_data_order
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___
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{{{
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my ($ABCD,$E,$E0,$E1)=map("v$_.16b",(0..3));
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my @MSG=map("v$_.16b",(4..7));
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my @Kxx=map("v$_.4s",(16..19));
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my ($W0,$W1)=("v20.4s","v21.4s");
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my $ABCD_SAVE="v22.16b";
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$code.=<<___;
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.type sha1_block_armv8,%function
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.align 6
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sha1_block_armv8:
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.Lv8_entry:
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stp x29,x30,[sp,#-16]!
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add x29,sp,#0
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Support execute-only memory for AArch64 assembly.
Put data in .rodata and, rather than adr, use the combination of adrp :pg_hi21:
and add :lo12:. Unfortunately, iOS uses different syntax, so we must add more
transforms to arm-xlate.pl.
Tested manually by:
1. Use Android NDK r19-beta1
2. Follow usual instructions to configure CMake for aarch64, but pass
-DCMAKE_EXE_LINKER_FLAGS="-fuse-ld=lld -Wl,-execute-only".
3. Build. Confirm with readelf -l tool/bssl that .text is not marked
readable.
4. Push the test binaries onto a Pixel 3. Test normally and with
--cpu={none,neon,crypto}. I had to pass --gtest_filter=-*Thread* to
crypto_test. There appears to be an issue with some runtime function
that's unrelated to our assembly.
No measurable performance difference.
Going forward, to support this, we will need to apply similar changes to
all other AArch64 assembly. This is relatively straightforward, but may
be a little finicky for dual-AArch32/AArch64 files (aesv8-armx.pl).
Update-Note: Assembly syntax is a mess. There's a decent chance some
assembler will get offend.
Change-Id: Ib59b921d4cce76584320fefd23e6bb7ebd4847eb
Reviewed-on: https://boringssl-review.googlesource.com/c/33245
Reviewed-by: Adam Langley <agl@google.com>
Commit-Queue: David Benjamin <davidben@google.com>
2018-11-16 21:34:05 +00:00
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adrp x4,:pg_hi21:.Lconst
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add x4,x4,:lo12:.Lconst
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2015-01-09 23:44:37 +00:00
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eor $E,$E,$E
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ld1.32 {$ABCD},[$ctx],#16
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ld1.32 {$E}[0],[$ctx]
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sub $ctx,$ctx,#16
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ld1.32 {@Kxx[0]-@Kxx[3]},[x4]
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.Loop_hw:
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ld1 {@MSG[0]-@MSG[3]},[$inp],#64
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sub $num,$num,#1
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rev32 @MSG[0],@MSG[0]
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rev32 @MSG[1],@MSG[1]
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add.i32 $W0,@Kxx[0],@MSG[0]
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rev32 @MSG[2],@MSG[2]
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orr $ABCD_SAVE,$ABCD,$ABCD // offload
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add.i32 $W1,@Kxx[0],@MSG[1]
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rev32 @MSG[3],@MSG[3]
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sha1h $E1,$ABCD
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sha1c $ABCD,$E,$W0 // 0
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add.i32 $W0,@Kxx[$j],@MSG[2]
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sha1su0 @MSG[0],@MSG[1],@MSG[2]
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___
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for ($j=0,$i=1;$i<20-3;$i++) {
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my $f=("c","p","m","p")[$i/5];
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$code.=<<___;
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sha1h $E0,$ABCD // $i
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sha1$f $ABCD,$E1,$W1
|
|
|
|
add.i32 $W1,@Kxx[$j],@MSG[3]
|
|
|
|
sha1su1 @MSG[0],@MSG[3]
|
|
|
|
___
|
|
|
|
$code.=<<___ if ($i<20-4);
|
|
|
|
sha1su0 @MSG[1],@MSG[2],@MSG[3]
|
|
|
|
___
|
|
|
|
($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0);
|
|
|
|
push(@MSG,shift(@MSG)); $j++ if ((($i+3)%5)==0);
|
|
|
|
}
|
|
|
|
$code.=<<___;
|
|
|
|
sha1h $E0,$ABCD // $i
|
|
|
|
sha1p $ABCD,$E1,$W1
|
|
|
|
add.i32 $W1,@Kxx[$j],@MSG[3]
|
|
|
|
|
|
|
|
sha1h $E1,$ABCD // 18
|
|
|
|
sha1p $ABCD,$E0,$W0
|
|
|
|
|
|
|
|
sha1h $E0,$ABCD // 19
|
|
|
|
sha1p $ABCD,$E1,$W1
|
|
|
|
|
|
|
|
add.i32 $E,$E,$E0
|
|
|
|
add.i32 $ABCD,$ABCD,$ABCD_SAVE
|
|
|
|
|
|
|
|
cbnz $num,.Loop_hw
|
|
|
|
|
|
|
|
st1.32 {$ABCD},[$ctx],#16
|
|
|
|
st1.32 {$E}[0],[$ctx]
|
|
|
|
|
|
|
|
ldr x29,[sp],#16
|
|
|
|
ret
|
|
|
|
.size sha1_block_armv8,.-sha1_block_armv8
|
Support execute-only memory for AArch64 assembly.
Put data in .rodata and, rather than adr, use the combination of adrp :pg_hi21:
and add :lo12:. Unfortunately, iOS uses different syntax, so we must add more
transforms to arm-xlate.pl.
Tested manually by:
1. Use Android NDK r19-beta1
2. Follow usual instructions to configure CMake for aarch64, but pass
-DCMAKE_EXE_LINKER_FLAGS="-fuse-ld=lld -Wl,-execute-only".
3. Build. Confirm with readelf -l tool/bssl that .text is not marked
readable.
4. Push the test binaries onto a Pixel 3. Test normally and with
--cpu={none,neon,crypto}. I had to pass --gtest_filter=-*Thread* to
crypto_test. There appears to be an issue with some runtime function
that's unrelated to our assembly.
No measurable performance difference.
Going forward, to support this, we will need to apply similar changes to
all other AArch64 assembly. This is relatively straightforward, but may
be a little finicky for dual-AArch32/AArch64 files (aesv8-armx.pl).
Update-Note: Assembly syntax is a mess. There's a decent chance some
assembler will get offend.
Change-Id: Ib59b921d4cce76584320fefd23e6bb7ebd4847eb
Reviewed-on: https://boringssl-review.googlesource.com/c/33245
Reviewed-by: Adam Langley <agl@google.com>
Commit-Queue: David Benjamin <davidben@google.com>
2018-11-16 21:34:05 +00:00
|
|
|
.section .rodata
|
2015-01-09 23:44:37 +00:00
|
|
|
.align 6
|
|
|
|
.Lconst:
|
|
|
|
.long 0x5a827999,0x5a827999,0x5a827999,0x5a827999 //K_00_19
|
|
|
|
.long 0x6ed9eba1,0x6ed9eba1,0x6ed9eba1,0x6ed9eba1 //K_20_39
|
|
|
|
.long 0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc //K_40_59
|
|
|
|
.long 0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6 //K_60_79
|
|
|
|
.asciz "SHA1 block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
|
|
|
|
.align 2
|
|
|
|
.comm OPENSSL_armcap_P,4,4
|
2018-10-02 04:15:42 +01:00
|
|
|
.hidden OPENSSL_armcap_P
|
2015-01-09 23:44:37 +00:00
|
|
|
___
|
|
|
|
}}}
|
|
|
|
|
|
|
|
{ my %opcode = (
|
|
|
|
"sha1c" => 0x5e000000, "sha1p" => 0x5e001000,
|
|
|
|
"sha1m" => 0x5e002000, "sha1su0" => 0x5e003000,
|
|
|
|
"sha1h" => 0x5e280800, "sha1su1" => 0x5e281800 );
|
|
|
|
|
|
|
|
sub unsha1 {
|
|
|
|
my ($mnemonic,$arg)=@_;
|
|
|
|
|
|
|
|
$arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
|
|
|
|
&&
|
|
|
|
sprintf ".inst\t0x%08x\t//%s %s",
|
|
|
|
$opcode{$mnemonic}|$1|($2<<5)|($3<<16),
|
|
|
|
$mnemonic,$arg;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
foreach(split("\n",$code)) {
|
|
|
|
|
|
|
|
s/\`([^\`]*)\`/eval($1)/geo;
|
|
|
|
|
|
|
|
s/\b(sha1\w+)\s+([qv].*)/unsha1($1,$2)/geo;
|
|
|
|
|
|
|
|
s/\.\w?32\b//o and s/\.16b/\.4s/go;
|
|
|
|
m/(ld|st)1[^\[]+\[0\]/o and s/\.4s/\.s/go;
|
|
|
|
|
|
|
|
print $_,"\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
close STDOUT;
|