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@@ -375,52 +375,50 @@ void CRYPTO_ghash_init(gmult_func *out_mult, ghash_func *out_hash, |
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gcm_init_avx(out_table, H.u); |
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*out_mult = gcm_gmult_avx; |
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*out_hash = gcm_ghash_avx; |
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} else { |
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gcm_init_clmul(out_table, H.u); |
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*out_mult = gcm_gmult_clmul; |
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*out_hash = gcm_ghash_clmul; |
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return; |
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} |
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gcm_init_clmul(out_table, H.u); |
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*out_mult = gcm_gmult_clmul; |
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*out_hash = gcm_ghash_clmul; |
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return; |
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} |
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gcm_init_4bit(out_table, H.u); |
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#if defined(GHASH_ASM_X86) /* x86 only */ |
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if (OPENSSL_ia32cap_P[0] & (1 << 25)) { /* check SSE bit */ |
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gcm_init_4bit(out_table, H.u); |
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*out_mult = gcm_gmult_4bit_mmx; |
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*out_hash = gcm_ghash_4bit_mmx; |
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} else { |
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*out_mult = gcm_gmult_4bit_x86; |
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*out_hash = gcm_ghash_4bit_x86; |
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return; |
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} |
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#else |
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*out_mult = gcm_gmult_4bit; |
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*out_hash = gcm_ghash_4bit; |
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#endif |
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#elif defined(GHASH_ASM_ARM) |
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if (pmull_capable()) { |
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gcm_init_v8(out_table, H.u); |
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*out_mult = gcm_gmult_v8; |
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*out_hash = gcm_ghash_v8; |
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} else if (neon_capable()) { |
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return; |
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} |
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if (neon_capable()) { |
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gcm_init_neon(out_table, H.u); |
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*out_mult = gcm_gmult_neon; |
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*out_hash = gcm_ghash_neon; |
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} else { |
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gcm_init_4bit(out_table, H.u); |
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*out_mult = gcm_gmult_4bit; |
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*out_hash = gcm_ghash_4bit; |
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return; |
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} |
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#elif defined(GHASH_ASM_PPC64LE) |
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if (CRYPTO_is_PPC64LE_vcrypto_capable()) { |
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gcm_init_p8(out_table, H.u); |
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*out_mult = gcm_gmult_p8; |
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*out_hash = gcm_ghash_p8; |
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} else { |
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gcm_init_4bit(out_table, H.u); |
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*out_mult = gcm_gmult_4bit; |
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*out_hash = gcm_ghash_4bit; |
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return; |
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} |
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#else |
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#endif |
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gcm_init_4bit(out_table, H.u); |
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#if defined(GHASH_ASM_X86) |
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*out_mult = gcm_gmult_4bit_x86; |
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*out_hash = gcm_ghash_4bit_x86; |
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#else |
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*out_mult = gcm_gmult_4bit; |
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*out_hash = gcm_ghash_4bit; |
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#endif |
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