bn/asm/armv4-gf2m.pl, modes/asm/ghash-armv4.pl: faster multiplication algorithm suggested in following paper:
Câmara, D.; Gouvêa, C. P. L.; López, J. & Dahab, R.: Fast Software Polynomial Multiplication on ARM Processors using the NEON Engine. http://conradoplg.cryptoland.net/files/2010/12/mocrysen13.pdf (Imported from upstream's 0fb3d5b4fdc76b8d4a4700d03480cda135c6c117)
This commit is contained in:
Adam Langley
parent
89b73fbafa
commit
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@ -35,6 +35,20 @@
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# Add NEON implementation featuring polynomial multiplication, i.e. no
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# lookup tables involved. On Cortex A8 it was measured to process one
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# byte in 15 cycles or 55% faster than integer-only code.
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#
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# April 2014
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#
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# Switch to multiplication algorithm suggested in paper referred
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# below and combine it with reduction algorithm from x86 module.
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# Performance improvement over previous version varies from 65% on
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# Snapdragon S4 to 110% on Cortex A9. In absolute terms Cortex A8
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# processes one byte in 8.45 cycles, A9 - in 10.2, Snapdragon S4 -
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# in 9.33.
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#
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# Câmara, D.; Gouvêa, C. P. L.; López, J. & Dahab, R.: Fast Software
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# Polynomial Multiplication on ARM Processors using the NEON Engine.
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#
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# http://conradoplg.cryptoland.net/files/2010/12/mocrysen13.pdf
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# ====================================================================
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# Note about "528B" variant. In ARM case it makes lesser sense to
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@ -304,115 +318,158 @@ $code.=<<___;
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.size gcm_gmult_4bit,.-gcm_gmult_4bit
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___
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{
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my $cnt=$Htbl; # $Htbl is used once in the very beginning
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my ($Xl,$Xm,$Xh,$IN)=map("q$_",(0..3));
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my ($t0,$t1,$t2,$t3)=map("q$_",(8..12));
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my ($Hlo,$Hhi,$Hhl,$k48,$k32,$k16)=map("d$_",(26..31));
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my ($Hhi, $Hlo, $Zo, $T, $xi, $mod) = map("d$_",(0..7));
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my ($Qhi, $Qlo, $Z, $R, $zero, $Qpost, $IN) = map("q$_",(8..15));
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# Z:Zo keeps 128-bit result shifted by 1 to the right, with bottom bit
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# in Zo. Or should I say "top bit", because GHASH is specified in
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# reverse bit order? Otherwise straightforward 128-bt H by one input
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# byte multiplication and modulo-reduction, times 16.
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sub Dlo() { shift=~m|q([1]?[0-9])|?"d".($1*2):""; }
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sub Dhi() { shift=~m|q([1]?[0-9])|?"d".($1*2+1):""; }
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sub Q() { shift=~m|d([1-3]?[02468])|?"q".($1/2):""; }
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sub clmul64x64 {
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my ($r,$a,$b)=@_;
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$code.=<<___;
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vext.8 $t0#lo, $a, $a, #1 @ A1
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vmull.p8 $t0, $t0#lo, $b @ F = A1*B
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vext.8 $r#lo, $b, $b, #1 @ B1
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vmull.p8 $r, $a, $r#lo @ E = A*B1
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vext.8 $t1#lo, $a, $a, #2 @ A2
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vmull.p8 $t1, $t1#lo, $b @ H = A2*B
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vext.8 $t3#lo, $b, $b, #2 @ B2
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vmull.p8 $t3, $a, $t3#lo @ G = A*B2
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vext.8 $t2#lo, $a, $a, #3 @ A3
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veor $t0, $t0, $r @ L = E + F
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vmull.p8 $t2, $t2#lo, $b @ J = A3*B
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vext.8 $r#lo, $b, $b, #3 @ B3
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veor $t1, $t1, $t3 @ M = G + H
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vmull.p8 $r, $a, $r#lo @ I = A*B3
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veor $t0#lo, $t0#lo, $t0#hi @ t0 = (L) (P0 + P1) << 8
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vand $t0#hi, $t0#hi, $k48
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vext.8 $t3#lo, $b, $b, #4 @ B4
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veor $t1#lo, $t1#lo, $t1#hi @ t1 = (M) (P2 + P3) << 16
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vand $t1#hi, $t1#hi, $k32
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vmull.p8 $t3, $a, $t3#lo @ K = A*B4
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veor $t2, $t2, $r @ N = I + J
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veor $t0#lo, $t0#lo, $t0#hi
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veor $t1#lo, $t1#lo, $t1#hi
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veor $t2#lo, $t2#lo, $t2#hi @ t2 = (N) (P4 + P5) << 24
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vand $t2#hi, $t2#hi, $k16
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vext.8 $t0, $t0, $t0, #15
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veor $t3#lo, $t3#lo, $t3#hi @ t3 = (K) (P6 + P7) << 32
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vmov.i64 $t3#hi, #0
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vext.8 $t1, $t1, $t1, #14
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veor $t2#lo, $t2#lo, $t2#hi
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vmull.p8 $r, $a, $b @ D = A*B
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vext.8 $t3, $t3, $t3, #12
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vext.8 $t2, $t2, $t2, #13
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veor $t0, $t0, $t1
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veor $t2, $t2, $t3
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veor $r, $r, $t0
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veor $r, $r, $t2
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___
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}
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$code.=<<___;
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#if __ARM_ARCH__>=7
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.fpu neon
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.global gcm_init_neon
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.type gcm_init_neon,%function
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.align 4
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gcm_init_neon:
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vld1.64 $IN#hi,[r1,:64]! @ load H
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vmov.i8 $t0,#0xe1
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vld1.64 $IN#lo,[r1,:64]
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vshl.i64 $t0#hi,#57
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vshr.u64 $t0#lo,#63 @ t0=0xc2....01
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vdup.8 $t1,$IN#hi[7]
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vshr.u64 $Hlo,$IN#lo,#63
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vshr.s8 $t1,#7 @ broadcast carry bit
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vshl.i64 $IN,$IN,#1
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vand $t0,$t0,$t1
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vorr $IN#hi,$Hlo @ H<<<=1
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veor $IN,$IN,$t0 @ twisted H
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vstmia r0,{$IN}
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bx lr
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.size gcm_init_neon,.-gcm_init_neon
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.global gcm_gmult_neon
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.type gcm_gmult_neon,%function
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.align 4
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gcm_gmult_neon:
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sub $Htbl,#16 @ point at H in GCM128_CTX
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vld1.64 `&Dhi("$IN")`,[$Xi,:64]!@ load Xi
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vmov.i32 $mod,#0xe1 @ our irreducible polynomial
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vld1.64 `&Dlo("$IN")`,[$Xi,:64]!
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vshr.u64 $mod,#32
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vldmia $Htbl,{$Hhi-$Hlo} @ load H
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veor $zero,$zero
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vld1.64 $IN#hi,[$Xi,:64]! @ load Xi
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vld1.64 $IN#lo,[$Xi,:64]!
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vmov.i64 $k48,#0x0000ffffffffffff
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vldmia $Htbl,{$Hlo-$Hhi} @ load twisted H
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vmov.i64 $k32,#0x00000000ffffffff
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#ifdef __ARMEL__
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vrev64.8 $IN,$IN
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#endif
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veor $Qpost,$Qpost
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veor $R,$R
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mov $cnt,#16
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veor $Z,$Z
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vmov.i64 $k16,#0x000000000000ffff
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veor $Hhl,$Hlo,$Hhi @ Karatsuba pre-processing
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mov $len,#16
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veor $Zo,$Zo
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vdup.8 $xi,`&Dlo("$IN")`[0] @ broadcast lowest byte
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b .Linner_neon
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b .Lgmult_neon
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.size gcm_gmult_neon,.-gcm_gmult_neon
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.global gcm_ghash_neon
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.type gcm_ghash_neon,%function
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.align 4
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gcm_ghash_neon:
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vld1.64 `&Dhi("$Z")`,[$Xi,:64]! @ load Xi
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vmov.i32 $mod,#0xe1 @ our irreducible polynomial
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vld1.64 `&Dlo("$Z")`,[$Xi,:64]!
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vshr.u64 $mod,#32
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vldmia $Xi,{$Hhi-$Hlo} @ load H
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veor $zero,$zero
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nop
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vld1.64 $Xl#hi,[$Xi,:64]! @ load Xi
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vld1.64 $Xl#lo,[$Xi,:64]!
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vmov.i64 $k48,#0x0000ffffffffffff
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vldmia $Htbl,{$Hlo-$Hhi} @ load twisted H
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vmov.i64 $k32,#0x00000000ffffffff
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#ifdef __ARMEL__
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vrev64.8 $Z,$Z
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vrev64.8 $Xl,$Xl
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#endif
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.Louter_neon:
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vld1.64 `&Dhi($IN)`,[$inp]! @ load inp
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veor $Qpost,$Qpost
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vld1.64 `&Dlo($IN)`,[$inp]!
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veor $R,$R
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mov $cnt,#16
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vmov.i64 $k16,#0x000000000000ffff
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veor $Hhl,$Hlo,$Hhi @ Karatsuba pre-processing
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.Loop_neon:
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vld1.64 $IN#hi,[$inp]! @ load inp
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vld1.64 $IN#lo,[$inp]!
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#ifdef __ARMEL__
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vrev64.8 $IN,$IN
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#endif
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veor $Zo,$Zo
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veor $IN,$Z @ inp^=Xi
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veor $Z,$Z
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vdup.8 $xi,`&Dlo("$IN")`[0] @ broadcast lowest byte
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.Linner_neon:
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subs $cnt,$cnt,#1
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vmull.p8 $Qlo,$Hlo,$xi @ H.lo·Xi[i]
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vmull.p8 $Qhi,$Hhi,$xi @ H.hi·Xi[i]
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vext.8 $IN,$zero,#1 @ IN>>=8
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veor $IN,$Xl @ inp^=Xi
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.Lgmult_neon:
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___
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&clmul64x64 ($Xl,$Hlo,"$IN#lo"); # H.lo·Xi.lo
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$code.=<<___;
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veor $IN#lo,$IN#lo,$IN#hi @ Karatsuba pre-processing
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___
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&clmul64x64 ($Xm,$Hhl,"$IN#lo"); # (H.lo+H.hi)·(Xi.lo+Xi.hi)
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&clmul64x64 ($Xh,$Hhi,"$IN#hi"); # H.hi·Xi.hi
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$code.=<<___;
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veor $Xm,$Xm,$Xl @ Karatsuba post-processing
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veor $Xm,$Xm,$Xh
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veor $Xl#hi,$Xl#hi,$Xm#lo
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veor $Xh#lo,$Xh#lo,$Xm#hi @ Xh|Xl - 256-bit result
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veor $Z,$Qpost @ modulo-scheduled part
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vshl.i64 `&Dlo("$R")`,#48
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vdup.8 $xi,`&Dlo("$IN")`[0] @ broadcast lowest byte
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veor $T,`&Dlo("$Qlo")`,`&Dlo("$Z")`
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@ equivalent of reduction_avx from ghash-x86_64.pl
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vshl.i64 $t1,$Xl,#57 @ 1st phase
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vshl.i64 $t2,$Xl,#62
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veor $t2,$t2,$t1 @
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vshl.i64 $t1,$Xl,#63
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veor $t2, $t2, $t1 @
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veor $Xl#hi,$Xl#hi,$t2#lo @
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veor $Xh#lo,$Xh#lo,$t2#hi
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veor `&Dhi("$Z")`,`&Dlo("$R")`
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vuzp.8 $Qlo,$Qhi
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vsli.8 $Zo,$T,#1 @ compose the "carry" byte
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vext.8 $Z,$zero,#1 @ Z>>=8
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vshr.u64 $t2,$Xl,#1 @ 2nd phase
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veor $Xh,$Xh,$Xl
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veor $Xl,$Xl,$t2 @
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vshr.u64 $t2,$t2,#6
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vshr.u64 $Xl,$Xl,#1 @
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veor $Xl,$Xl,$Xh @
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veor $Xl,$Xl,$t2 @
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vmull.p8 $R,$Zo,$mod @ "carry"·0xe1
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vshr.u8 $Zo,$T,#7 @ save Z's bottom bit
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vext.8 $Qpost,$Qlo,$zero,#1 @ Qlo>>=8
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veor $Z,$Qhi
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bne .Linner_neon
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veor $Z,$Qpost @ modulo-scheduled artefact
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vshl.i64 `&Dlo("$R")`,#48
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veor `&Dhi("$Z")`,`&Dlo("$R")`
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@ finalization, normalize Z:Zo
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vand $Zo,$mod @ suffices to mask the bit
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vshr.u64 `&Dhi(&Q("$Zo"))`,`&Dlo("$Z")`,#63
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vshl.i64 $Z,#1
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subs $len,#16
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vorr $Z,`&Q("$Zo")` @ Z=Z:Zo<<1
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bne .Louter_neon
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bne .Loop_neon
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#ifdef __ARMEL__
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vrev64.8 $Z,$Z
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vrev64.8 $Xl,$Xl
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#endif
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sub $Xi,#16
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vst1.64 `&Dhi("$Z")`,[$Xi,:64]! @ write out Xi
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vst1.64 `&Dlo("$Z")`,[$Xi,:64]
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vst1.64 $Xl#hi,[$Xi,:64]! @ write out Xi
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vst1.64 $Xl#lo,[$Xi,:64]
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bx lr
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.size gcm_ghash_neon,.-gcm_ghash_neon
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@ -426,7 +483,12 @@ $code.=<<___;
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#endif
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___
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$code =~ s/\`([^\`]*)\`/eval $1/gem;
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$code =~ s/\bbx\s+lr\b/.word\t0xe12fff1e/gm; # make it possible to compile with -march=armv4
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print $code;
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foreach (split("\n",$code)) {
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s/\`([^\`]*)\`/eval $1/geo;
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s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo or
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s/\bbx\s+lr\b/.word\t0xe12fff1e/go; # make it possible to compile with -march=armv4
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print $_,"\n";
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}
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close STDOUT; # enforce flush
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@ -350,6 +350,7 @@ void gcm_ghash_4bit_x86(uint64_t Xi[2], const u128 Htable[16], const uint8_t *in
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#if __ARM_ARCH__ >= 7
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#define GHASH_ASM_ARM
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#define GCM_FUNCREF_4BIT
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void gcm_init_neon(u128 Htable[16],const uint64_t Xi[2]);
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void gcm_gmult_neon(uint64_t Xi[2], const u128 Htable[16]);
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void gcm_ghash_neon(uint64_t Xi[2], const u128 Htable[16], const uint8_t *inp,
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size_t len);
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@ -433,6 +434,7 @@ void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block) {
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#endif
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#elif defined(GHASH_ASM_ARM)
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if (CRYPTO_is_NEON_capable()) {
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gcm_init_neon(ctx->Htable,ctx->H.u);
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ctx->gmult = gcm_gmult_neon;
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ctx->ghash = gcm_ghash_neon;
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} else {
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