Adam Langley ff2394527f ppc64le delocate: avoid r0 as a base register. ... On POWER, r0 is wired to zero in some argument positions of some instructions. The base register for a load is one of them. Thus, if rewriting a load to r0, we cannot use r0 to store the base address. This could be more efficient, but loading to r0 appears to be very rare so I'm not going to worry about it for now. Change-Id: I14dac96ba4c0380b166a7667b0cba918f1ae25ec Reviewed-on: https://boringssl-review.googlesource.com/17065 Commit-Queue: Adam Langley <agl@google.com> Commit-Queue: David Benjamin <davidben@google.com> Reviewed-by: David Benjamin <davidben@google.com> CQ-Verified: CQ bot account: commit-bot@chromium.org <commit-bot@chromium.org>		2017-06-10 00:00:58 +00:00
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ppc64le-GlobalEntry	Be slightly more relaxed about how ppc64le global-entry TOC references look.	2017-06-08 21:33:29 +00:00
ppc64le-LoadToR0	ppc64le delocate: avoid r0 as a base register.	2017-06-10 00:00:58 +00:00
ppc64le-Sample
ppc64le-Sample2	Switch to new delocate tool.	2017-05-30 18:00:16 +00:00
ppc64le-TOCWithOffset	Support more complex offset / symbol section interleavings.	2017-06-06 22:48:26 +00:00
x86_64-Basic
x86_64-BSS
x86_64-GOTRewrite
x86_64-LabelRewrite
x86_64-Sections