Adam Langley 3e6526575a aarch64 support. ... This is an initial cut at aarch64 support. I have only qemu to test it however—hopefully hardware will be coming soon. This also affects 32-bit ARM in that aarch64 chips can run 32-bit code and we would like to be able to take advantage of the crypto operations even in 32-bit mode. AES and GHASH should Just Work in this case: the -armx.pl files can be built for either 32- or 64-bit mode based on the flavour argument given to the Perl script. SHA-1 and SHA-256 don't work like this however because they've never support for multiple implementations, thus BoringSSL built for 32-bit won't use the SHA instructions on an aarch64 chip. No dedicated ChaCha20 or Poly1305 support yet. Change-Id: Ib275bc4894a365c8ec7c42f4e91af6dba3bd686c Reviewed-on: https://boringssl-review.googlesource.com/2801 Reviewed-by: Adam Langley <agl@google.com>		2015-01-14 23:38:11 +00:00
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sha1-586.pl	x86[_64] assembly pack: add Silvermont performance data.	2014-11-10 13:45:32 -08:00
sha1-armv4-large.pl	Add visibility rules.	2014-07-31 22:03:11 +00:00
sha1-armv8.pl	aarch64 support.	2015-01-14 23:38:11 +00:00
sha1-x86_64.pl	x86_64 assembly pack: allow clang to compile AVX code.	2014-07-28 17:05:13 -07:00
sha256-586.pl	x86[_64] assembly pack: add Silvermont performance data.	2014-11-10 13:45:32 -08:00
sha256-armv4.pl	Add visibility rules.	2014-07-31 22:03:11 +00:00
sha512-586.pl	x86[_64] assembly pack: add Silvermont performance data.	2014-11-10 13:45:32 -08:00
sha512-armv4.pl	Add visibility rules.	2014-07-31 22:03:11 +00:00
sha512-armv8.pl	aarch64 support.	2015-01-14 23:38:11 +00:00
sha512-x86_64.pl	x86[_64] assembly pack: add Silvermont performance data.	2014-11-10 13:45:32 -08:00