368 lines
15 KiB
C
368 lines
15 KiB
C
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/** @addtogroup dmamux_file DMAMUX peripheral API
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@ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly 2019 Guillaume Revaillot <g.revaillot@gmail.com>
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/dmamux.h>
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Reset DMA Channel
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Reset DMA Request configuration and interrupt flags for given DMA channel.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_reset_dma_channel(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) = 0;
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dmamux_clear_dma_request_sync_overrun(dmamux, channel);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set DMA Channel Request
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Set DMA Request Signal ID (@ref dmamux_cxcr_dmareq_id) for given DMA channel.
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Request must be set before enabling and after configuring said DMA channel.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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@param[in] request_id DMA request (@ref dmamux_cxcr_dmareq_id)
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*/
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void dmamux_set_dma_channel_request(uint32_t dmamux, uint8_t channel, uint8_t request_id)
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{
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uint32_t reg32 = DMAMUX_CxCR(dmamux, channel);
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reg32 &= ~(DMAMUX_CxCR_DMAREQ_ID_MASK << DMAMUX_CxCR_DMAREQ_ID_SHIFT);
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reg32 |= ((request_id & DMAMUX_CxCR_DMAREQ_ID_MASK) << DMAMUX_CxCR_DMAREQ_ID_SHIFT);
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DMAMUX_CxCR(dmamux, channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Get DMA Channel Request Selection
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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@returns DMA request (@ref dmamux_cxcr_dmareq_id)
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*/
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uint8_t dmamux_get_dma_channel_request(uint32_t dmamux, uint8_t channel)
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{
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return (DMAMUX_CxCR(dmamux, channel) >> DMAMUX_CxCR_DMAREQ_ID_SHIFT) & DMAMUX_CxCR_DMAREQ_ID_MASK;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Enable DMA Request Event Generation
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_enable_dma_request_event_generation(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) |= DMAMUX_CxCR_EGE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Disable DMA Request Event Generation
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_disable_dma_request_event_generation(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) &= ~DMAMUX_CxCR_EGE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set DMA Request Synchronization Input
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Set DMAMUX request synchronization input trigger signal id (@ref dmamux_cxcr_sync_id)
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for a given DMA channel.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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@param[in] sync_input_id synchronization signal input id (@ref dmamux_cxcr_sync_id)
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*/
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void dmamux_set_dma_request_sync_input(uint32_t dmamux, uint8_t channel, uint8_t sync_input_id)
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{
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uint32_t reg32 = DMAMUX_CxCR(dmamux, channel);
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reg32 &= ~(DMAMUX_CxCR_SYNC_ID_MASK << DMAMUX_CxCR_SYNC_ID_SHIFT);
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reg32 |= ((sync_input_id & DMAMUX_CxCR_SYNC_ID_MASK) << DMAMUX_CxCR_SYNC_ID_SHIFT);
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DMAMUX_CxCR(dmamux, channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set DMA Request Synchronization Event Polarity
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Set DMAMUX request synchronization input signal polarity (@ref dmamux_cxcr_spol)
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for a given DMA channel.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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@param[in] polarity synchronization signal input polarity (@ref dmamux_cxcr_spol)
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*/
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void dmamux_set_dma_request_sync_pol(uint32_t dmamux, uint8_t channel, uint8_t polarity)
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{
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uint32_t reg32 = DMAMUX_CxCR(dmamux, channel);
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reg32 &= ~(DMAMUX_CxCR_SPOL_MASK << DMAMUX_CxCR_SPOL_SHIFT);
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reg32 |= ((polarity & DMAMUX_CxCR_SPOL_MASK) << DMAMUX_CxCR_SPOL_SHIFT);
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DMAMUX_CxCR(dmamux, channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Enable DMA Request Synchronization
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Enable DMAMUX request synchronization for a given DMA channel, propagating DMA
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request when configured event edge (DMAREQ_CxCR_SPOL) is detected on previously
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selected synchronization trigger input id.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_enable_dma_request_sync(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) |= DMAMUX_CxCR_SE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Disable DMA Request Synchronization
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_disable_dma_request_sync(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) &= ~DMAMUX_CxCR_SE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set DMA Request NBREQ To Forward
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Set number of request to forward (minus 1) to the dma controller after a synchronization
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event. This must be configured with synchronization and event generation disabled.
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@param[in] dmamux DMAMUX Controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA Channel Number (@ref dma_ch)
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@param[in] nbreq Number of DMA Requests to Forward - minus 1 (0..31)
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*/
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void dmamux_set_dma_request_sync_nbreq(uint32_t dmamux, uint8_t channel, uint8_t nbreq)
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{
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uint32_t reg32 = DMAMUX_CxCR(dmamux, channel);
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reg32 &= ~(DMAMUX_CxCR_NBREQ_MASK << DMAMUX_CxCR_NBREQ_SHIFT);
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reg32 |= ((nbreq & DMAMUX_CxCR_NBREQ_MASK) << DMAMUX_CxCR_NBREQ_SHIFT);
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DMAMUX_CxCR(dmamux, channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Enable DMA Request Overrun Interrupt
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_enable_dma_request_sync_overrun_interrupt(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) |= DMAMUX_CxCR_SOIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Disable DMA Request Overrun Interrupt
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_disable_dma_request_sync_overrun_interrupt(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CxCR(dmamux, channel) &= ~DMAMUX_CxCR_SOIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Get DMA Request Synchronization Overrun Interrupt Flag
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Get DMA Request Synchronization Overrun Interrupt for given DMA channel
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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@returns DMA Channel Synchronization Overrun Interrupt Flag
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*/
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uint32_t dmamux_get_dma_request_sync_overrun(uint32_t dmamux, uint8_t channel)
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{
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return DMAMUX_CSR(dmamux) & DMAMUX_CSR_SOF(channel);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Clear DMA Request Synchronization Overrun Interrupt Flag
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Clear DMA Request Synchronization Overrun Interrupt for given DMA channel
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] channel DMA channel number (@ref dma_ch)
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*/
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void dmamux_clear_dma_request_sync_overrun(uint32_t dmamux, uint8_t channel)
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{
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DMAMUX_CFR(dmamux) = DMAMUX_CFR_CSOF(channel);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Reset Request Generator Channel
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Reset Request Generator Channel Configuration and interrupt flags.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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*/
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void dmamux_reset_request_generator_channel(uint32_t dmamux, uint8_t rg_channel)
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{
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DMAMUX_CxCR(dmamux, rg_channel) = 0;
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dmamux_clear_request_generator_trigger_overrun_interrupt(dmamux, rg_channel);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Enable Request Generator Channel
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Enable Request Generator Channel, Producting DMA Request on input signal trigger.
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These Requests are usable by the DMA Request Router.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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*/
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void dmamux_enable_request_generator(uint32_t dmamux, uint8_t rg_channel)
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{
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DMAMUX_RGxCR(dmamux, rg_channel) |= DMAMUX_RGxCR_GE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Disable Request Generator Channel
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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*/
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void dmamux_disable_request_generator(uint32_t dmamux, uint8_t rg_channel)
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{
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DMAMUX_RGxCR(dmamux, rg_channel) &= ~DMAMUX_RGxCR_GE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set Request Generator Input Trigger Signal
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Set DMAMUX Request Generator input signal id (@ref dmamux_rgxcr_sig_id) for given
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Request Generator Channel.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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@param[in] sig_id Request Generator Channel Input Signal Id (@ref dmamux_rgxcr_sig_id)
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*/
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void dmamux_set_request_generator_trigger(uint32_t dmamux, uint8_t rg_channel, uint8_t sig_id)
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{
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uint32_t reg32 = DMAMUX_RGxCR(dmamux, rg_channel);
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reg32 &= ~(DMAMUX_RGxCR_SIG_ID_MASK << DMAMUX_RGxCR_SIG_ID_SHIFT);
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reg32 |= ((sig_id & DMAMUX_RGxCR_SIG_ID_MASK) << DMAMUX_RGxCR_SIG_ID_SHIFT);
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DMAMUX_RGxCR(dmamux, rg_channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set Request Generator Trigger Polarity
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Set DMAMUX Request Generator input signal polarity (@ref dmamux_rgxcr_gpol).
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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@param[in] polarity Trigger signal input polarity (@ref dmamux_rgxcr_gpol)
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*/
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void dmamux_set_request_generator_trigger_pol(uint32_t dmamux, uint8_t rg_channel, uint8_t polarity)
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{
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uint32_t reg32 = DMAMUX_RGxCR(dmamux, rg_channel);
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reg32 &= ~(DMAMUX_RGxCR_GPOL_MASK << DMAMUX_RGxCR_GPOL_SHIFT);
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reg32 |= ((polarity & DMAMUX_RGxCR_GPOL_MASK) << DMAMUX_RGxCR_GPOL_SHIFT);
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DMAMUX_RGxCR(dmamux, rg_channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Set Request Generator Trigger GNBREQ
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Set number of request to generate (minus 1). This must be configured while
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given Request Generator is disabled.
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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@param[in] gnbreq Number of DMA Requests to Generate - minus 1 (0..31).
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*/
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void dmamux_set_request_generator_trigger_gnbreq(uint32_t dmamux, uint8_t rg_channel, uint8_t gnbreq)
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{
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uint32_t reg32 = DMAMUX_RGxCR(dmamux, rg_channel);
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reg32 &= ~(DMAMUX_RGxCR_GNBREQ_MASK << DMAMUX_RGxCR_GNBREQ_SHIFT);
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reg32 |= ((gnbreq & DMAMUX_RGxCR_GNBREQ_MASK) << DMAMUX_RGxCR_GNBREQ_SHIFT);
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DMAMUX_RGxCR(dmamux, rg_channel) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Enable Request Generator Trigger Overrun Interrupt
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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*/
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void dmamux_enable_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel)
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|
{
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||
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|
DMAMUX_RGxCR(dmamux, rg_channel) |= DMAMUX_RGxCR_OIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DMAMUX Disable Request Generator Trigger Overrun Interrupt
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|
|
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||
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@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
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||
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|
@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
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||
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|
*/
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||
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void dmamux_disable_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel)
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||
|
|
{
|
||
|
|
DMAMUX_RGxCR(dmamux, rg_channel) &= ~DMAMUX_RGxCR_OIE;
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||
|
|
}
|
||
|
|
|
||
|
|
/*---------------------------------------------------------------------------*/
|
||
|
|
/** @brief DMAMUX Get Request Generator Trigger Overrun Interrupt Flag
|
||
|
|
|
||
|
|
Get DMA Request Synchronization Overrun Interrupt Flag for given Request Generator Channel
|
||
|
|
|
||
|
|
@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
|
||
|
|
@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
|
||
|
|
@returns Request Generator Channel Trigger Overrun Interrupt Flag
|
||
|
|
*/
|
||
|
|
uint32_t dmamux_get_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel)
|
||
|
|
{
|
||
|
|
return DMAMUX_RGSR(dmamux) & DMAMUX_RGSR_OF(rg_channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*---------------------------------------------------------------------------*/
|
||
|
|
/** @brief DMAMUX Clear Request Generator Trigger Overrun Interrupt Flag
|
||
|
|
|
||
|
|
Clear DMA Request Synchronization Overrun Interrupt Flag for given Request Generator
|
||
|
|
Channel
|
||
|
|
|
||
|
|
@param[in] dmamux DMAMUX controller base address (@ref dmamux_reg_base)
|
||
|
|
@param[in] rg_channel Request Generator Channel Number (@ref dmamux_rg_channel)
|
||
|
|
*/
|
||
|
|
void dmamux_clear_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel)
|
||
|
|
{
|
||
|
|
DMAMUX_RGCFR(dmamux) = DMAMUX_RGCFR_COF(rg_channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/**@}*/
|