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  1. /** @addtogroup usb_file USB peripheral API
  2. * @ingroup peripheral_apis
  3. *
  4. * @brief USB Peripheral for Happy Gecko
  5. *
  6. * The Happy Gecko uses the "standard" usb_dwc_otg core.
  7. *
  8. * @sa usb_defines
  9. * @copyright See @ref lgpl_license
  10. */
  11. /*
  12. * This file is part of the libopencm3 project.
  13. *
  14. * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
  15. * Copyright (C) 2018 Seb Holzapfel <schnommus@gmail.com>
  16. *
  17. * This library is free software: you can redistribute it and/or modify
  18. * it under the terms of the GNU Lesser General Public License as published by
  19. * the Free Software Foundation, either version 3 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This library is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU Lesser General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU Lesser General Public License
  28. * along with this library. If not, see <http://www.gnu.org/licenses/>.
  29. */
  30. #include <string.h>
  31. #include <libopencm3/cm3/common.h>
  32. #include <libopencm3/efm32/memorymap.h>
  33. #include <libopencm3/efm32/cmu.h>
  34. #include <libopencm3/efm32/usb.h>
  35. #include <libopencm3/usb/usbd.h>
  36. #include <libopencm3/usb/dwc/otg_fs.h>
  37. #include "usb_private.h"
  38. #include "usb_dwc_common.h"
  39. /**@{*/
  40. /* Receive FIFO size in 32-bit words. */
  41. #define RX_FIFO_SIZE 256
  42. /* FIXME: EFM32HG has 6 bidirectional endpoints.
  43. * problem is "uint32_t doeptsiz[4];" in usb_private.h */
  44. #define ENDPOINT_COUNT 4
  45. static struct _usbd_device _usbd_dev;
  46. /** Initialize the USB device controller hardware of the EFM32HG. */
  47. static usbd_device *efm32hg_usbd_init(void)
  48. {
  49. /* Enable peripheral clocks required for USB */
  50. cmu_periph_clock_enable(CMU_USB);
  51. cmu_periph_clock_enable(CMU_USBC);
  52. cmu_periph_clock_enable(CMU_LE);
  53. /* Select LFRCO as LFCCLK clock */
  54. CMU_LFCLKSEL = CMU_LFCLKSEL_LFC_LFRCO;
  55. /* Enable the USBLE peripheral clock (sits on LFCCLK) */
  56. cmu_periph_clock_enable(CMU_USBLE);
  57. /* Calibrate USB based on communications */
  58. CMU_USHFRCOCONF = CMU_USHFRCOCONF_BAND_48MHZ;
  59. /* Enable USHFRCO Clock Recovery mode. */
  60. CMU_USBCRCTRL |= CMU_USBCRCTRL_EN;
  61. /* Select USHFRCO as clock source for USB */
  62. cmu_osc_on(USHFRCO);
  63. cmu_wait_for_osc_ready(USHFRCO);
  64. /* Set up the USB clock source */
  65. cmu_set_usbclk_source(USHFRCO);
  66. cmu_wait_for_usbclk_selected(USHFRCO);
  67. /* Turn off all Low Energy Mode (LEM) features. */
  68. USB_CTRL = 0;
  69. /* Initialize USB core */
  70. USB_ROUTE = USB_ROUTE_PHYPEN; /* Enable PHY pins. */
  71. /* Wait for AHB idle. */
  72. while (!(OTG_FS_GRSTCTL & OTG_GRSTCTL_AHBIDL));
  73. /* Do core soft reset. */
  74. OTG_FS_GRSTCTL |= OTG_GRSTCTL_CSRST;
  75. while (OTG_FS_GRSTCTL & OTG_GRSTCTL_CSRST);
  76. /* Explicitly enable DP pullup (not all cores do this by default) */
  77. OTG_FS_DCTL &= ~OTG_DCTL_SDIS;
  78. /* Force peripheral only mode. */
  79. OTG_FS_GUSBCFG |= OTG_GUSBCFG_FDMOD | OTG_GUSBCFG_TRDT_MASK;
  80. OTG_FS_GINTSTS = OTG_GINTSTS_MMIS;
  81. /* Full speed device. */
  82. OTG_FS_DCFG |= OTG_DCFG_DSPD;
  83. /* Restart the PHY clock. */
  84. OTG_FS_PCGCCTL = 0;
  85. OTG_FS_GRXFSIZ = efm32hg_usb_driver.rx_fifo_size;
  86. _usbd_dev.fifo_mem_top = efm32hg_usb_driver.rx_fifo_size;
  87. /* Unmask interrupts for TX and RX. */
  88. OTG_FS_GAHBCFG |= OTG_GAHBCFG_GINT;
  89. OTG_FS_GINTMSK = OTG_GINTMSK_ENUMDNEM |
  90. OTG_GINTMSK_RXFLVLM |
  91. OTG_GINTMSK_IEPINT |
  92. OTG_GINTMSK_USBSUSPM |
  93. OTG_GINTMSK_WUIM;
  94. OTG_FS_DAINTMSK = 0xF;
  95. OTG_FS_DIEPMSK = OTG_DIEPMSK_XFRCM;
  96. return &_usbd_dev;
  97. }
  98. const struct _usbd_driver efm32hg_usb_driver = {
  99. .init = efm32hg_usbd_init,
  100. .set_address = dwc_set_address,
  101. .ep_setup = dwc_ep_setup,
  102. .ep_reset = dwc_endpoints_reset,
  103. .ep_stall_set = dwc_ep_stall_set,
  104. .ep_stall_get = dwc_ep_stall_get,
  105. .ep_nak_set = dwc_ep_nak_set,
  106. .ep_write_packet = dwc_ep_write_packet,
  107. .ep_read_packet = dwc_ep_read_packet,
  108. .poll = dwc_poll,
  109. .disconnect = dwc_disconnect,
  110. .base_address = USB_OTG_FS_BASE,
  111. .set_address_before_status = 1,
  112. .rx_fifo_size = RX_FIFO_SIZE,
  113. };
  114. /**@}*/