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m4_init/3rd/libopencm3/scripts/data/lpc43xx/gpdma.yaml

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  1. !!omap

  2. - GPDMA_INTSTAT:

  3.     fields: !!omap

  4.     - INTSTAT:

  5.         access: r

  6.         description: Status of DMA channel interrupts after masking

  7.         lsb: 0

  8.         reset_value: '0x00'

  9.         width: 8

  10. - GPDMA_INTTCSTAT:

  11.     fields: !!omap

  12.     - INTTCSTAT:

  13.         access: r

  14.         description: Terminal count interrupt request status for DMA channels

  15.         lsb: 0

  16.         reset_value: '0x00'

  17.         width: 8

  18. - GPDMA_INTTCCLEAR:

  19.     fields: !!omap

  20.     - INTTCCLEAR:

  21.         access: w

  22.         description: Allows clearing the Terminal count interrupt request (IntTCStat)

  23.           for DMA channels

  24.         lsb: 0

  25.         reset_value: '0x00'

  26.         width: 8

  27. - GPDMA_INTERRSTAT:

  28.     fields: !!omap

  29.     - INTERRSTAT:

  30.         access: r

  31.         description: Interrupt error status for DMA channels

  32.         lsb: 0

  33.         reset_value: '0x00'

  34.         width: 8

  35. - GPDMA_INTERRCLR:

  36.     fields: !!omap

  37.     - INTERRCLR:

  38.         access: w

  39.         description: Writing a 1 clears the error interrupt request (IntErrStat) for

  40.           DMA channels

  41.         lsb: 0

  42.         reset_value: '0x00'

  43.         width: 8

  44. - GPDMA_RAWINTTCSTAT:

  45.     fields: !!omap

  46.     - RAWINTTCSTAT:

  47.         access: r

  48.         description: Status of the terminal count interrupt for DMA channels prior

  49.           to masking

  50.         lsb: 0

  51.         reset_value: '0x00'

  52.         width: 8

  53. - GPDMA_RAWINTERRSTAT:

  54.     fields: !!omap

  55.     - RAWINTERRSTAT:

  56.         access: r

  57.         description: Status of the error interrupt for DMA channels prior to masking

  58.         lsb: 0

  59.         reset_value: '0x00'

  60.         width: 8

  61. - GPDMA_ENBLDCHNS:

  62.     fields: !!omap

  63.     - ENABLEDCHANNELS:

  64.         access: r

  65.         description: Enable status for DMA channels

  66.         lsb: 0

  67.         reset_value: '0x00'

  68.         width: 8

  69. - GPDMA_SOFTBREQ:

  70.     fields: !!omap

  71.     - SOFTBREQ:

  72.         access: rw

  73.         description: Software burst request flags for each of 16 possible sources

  74.         lsb: 0

  75.         reset_value: '0x00'

  76.         width: 16

  77. - GPDMA_SOFTSREQ:

  78.     fields: !!omap

  79.     - SOFTSREQ:

  80.         access: rw

  81.         description: Software single transfer request flags for each of 16 possible

  82.           sources

  83.         lsb: 0

  84.         reset_value: '0x00'

  85.         width: 16

  86. - GPDMA_SOFTLBREQ:

  87.     fields: !!omap

  88.     - SOFTLBREQ:

  89.         access: rw

  90.         description: Software last burst request flags for each of 16 possible sources

  91.         lsb: 0

  92.         reset_value: '0x00'

  93.         width: 16

  94. - GPDMA_SOFTLSREQ:

  95.     fields: !!omap

  96.     - SOFTLSREQ:

  97.         access: rw

  98.         description: Software last single transfer request flags for each of 16 possible

  99.           sources

  100.         lsb: 0

  101.         reset_value: '0x00'

  102.         width: 16

  103. - GPDMA_CONFIG:

  104.     fields: !!omap

  105.     - E:

  106.         access: rw

  107.         description: DMA Controller enable

  108.         lsb: 0

  109.         reset_value: '0'

  110.         width: 1

  111.     - M0:

  112.         access: rw

  113.         description: AHB Master 0 endianness configuration

  114.         lsb: 1

  115.         reset_value: '0'

  116.         width: 1

  117.     - M1:

  118.         access: rw

  119.         description: AHB Master 1 endianness configuration

  120.         lsb: 2

  121.         reset_value: '0'

  122.         width: 1

  123. - GPDMA_SYNC:

  124.     fields: !!omap

  125.     - DMACSYNC:

  126.         access: rw

  127.         description: Controls the synchronization logic for DMA request signals

  128.         lsb: 0

  129.         reset_value: '0x00'

  130.         width: 16

  131. - GPDMA_C0SRCADDR:

  132.     fields: !!omap

  133.     - SRCADDR:

  134.         access: rw

  135.         description: DMA source address

  136.         lsb: 0

  137.         reset_value: '0x00000000'

  138.         width: 32

  139. - GPDMA_C1SRCADDR:

  140.     fields: !!omap

  141.     - SRCADDR:

  142.         access: rw

  143.         description: DMA source address

  144.         lsb: 0

  145.         reset_value: '0x00000000'

  146.         width: 32

  147. - GPDMA_C2SRCADDR:

  148.     fields: !!omap

  149.     - SRCADDR:

  150.         access: rw

  151.         description: DMA source address

  152.         lsb: 0

  153.         reset_value: '0x00000000'

  154.         width: 32

  155. - GPDMA_C3SRCADDR:

  156.     fields: !!omap

  157.     - SRCADDR:

  158.         access: rw

  159.         description: DMA source address

  160.         lsb: 0

  161.         reset_value: '0x00000000'

  162.         width: 32

  163. - GPDMA_C4SRCADDR:

  164.     fields: !!omap

  165.     - SRCADDR:

  166.         access: rw

  167.         description: DMA source address

  168.         lsb: 0

  169.         reset_value: '0x00000000'

  170.         width: 32

  171. - GPDMA_C5SRCADDR:

  172.     fields: !!omap

  173.     - SRCADDR:

  174.         access: rw

  175.         description: DMA source address

  176.         lsb: 0

  177.         reset_value: '0x00000000'

  178.         width: 32

  179. - GPDMA_C6SRCADDR:

  180.     fields: !!omap

  181.     - SRCADDR:

  182.         access: rw

  183.         description: DMA source address

  184.         lsb: 0

  185.         reset_value: '0x00000000'

  186.         width: 32

  187. - GPDMA_C7SRCADDR:

  188.     fields: !!omap

  189.     - SRCADDR:

  190.         access: rw

  191.         description: DMA source address

  192.         lsb: 0

  193.         reset_value: '0x00000000'

  194.         width: 32

  195. - GPDMA_C0DESTADDR:

  196.     fields: !!omap

  197.     - DESTADDR:

  198.         access: rw

  199.         description: DMA source address

  200.         lsb: 0

  201.         reset_value: '0x00000000'

  202.         width: 32

  203. - GPDMA_C1DESTADDR:

  204.     fields: !!omap

  205.     - DESTADDR:

  206.         access: rw

  207.         description: DMA source address

  208.         lsb: 0

  209.         reset_value: '0x00000000'

  210.         width: 32

  211. - GPDMA_C2DESTADDR:

  212.     fields: !!omap

  213.     - DESTADDR:

  214.         access: rw

  215.         description: DMA source address

  216.         lsb: 0

  217.         reset_value: '0x00000000'

  218.         width: 32

  219. - GPDMA_C3DESTADDR:

  220.     fields: !!omap

  221.     - DESTADDR:

  222.         access: rw

  223.         description: DMA source address

  224.         lsb: 0

  225.         reset_value: '0x00000000'

  226.         width: 32

  227. - GPDMA_C4DESTADDR:

  228.     fields: !!omap

  229.     - DESTADDR:

  230.         access: rw

  231.         description: DMA source address

  232.         lsb: 0

  233.         reset_value: '0x00000000'

  234.         width: 32

  235. - GPDMA_C5DESTADDR:

  236.     fields: !!omap

  237.     - DESTADDR:

  238.         access: rw

  239.         description: DMA source address

  240.         lsb: 0

  241.         reset_value: '0x00000000'

  242.         width: 32

  243. - GPDMA_C6DESTADDR:

  244.     fields: !!omap

  245.     - DESTADDR:

  246.         access: rw

  247.         description: DMA source address

  248.         lsb: 0

  249.         reset_value: '0x00000000'

  250.         width: 32

  251. - GPDMA_C7DESTADDR:

  252.     fields: !!omap

  253.     - DESTADDR:

  254.         access: rw

  255.         description: DMA source address

  256.         lsb: 0

  257.         reset_value: '0x00000000'

  258.         width: 32

  259. - GPDMA_C0LLI:

  260.     fields: !!omap

  261.     - LM:

  262.         access: rw

  263.         description: AHB master select for loading the next LLI

  264.         lsb: 0

  265.         reset_value: '0'

  266.         width: 1

  267.     - LLI:

  268.         access: rw

  269.         description: Linked list item

  270.         lsb: 2

  271.         reset_value: '0x00000000'

  272.         width: 30

  273. - GPDMA_C1LLI:

  274.     fields: !!omap

  275.     - LM:

  276.         access: rw

  277.         description: AHB master select for loading the next LLI

  278.         lsb: 0

  279.         reset_value: '0'

  280.         width: 1

  281.     - LLI:

  282.         access: rw

  283.         description: Linked list item

  284.         lsb: 2

  285.         reset_value: '0x00000000'

  286.         width: 30

  287. - GPDMA_C2LLI:

  288.     fields: !!omap

  289.     - LM:

  290.         access: rw

  291.         description: AHB master select for loading the next LLI

  292.         lsb: 0

  293.         reset_value: '0'

  294.         width: 1

  295.     - LLI:

  296.         access: rw

  297.         description: Linked list item

  298.         lsb: 2

  299.         reset_value: '0x00000000'

  300.         width: 30

  301. - GPDMA_C3LLI:

  302.     fields: !!omap

  303.     - LM:

  304.         access: rw

  305.         description: AHB master select for loading the next LLI

  306.         lsb: 0

  307.         reset_value: '0'

  308.         width: 1

  309.     - LLI:

  310.         access: rw

  311.         description: Linked list item

  312.         lsb: 2

  313.         reset_value: '0x00000000'

  314.         width: 30

  315. - GPDMA_C4LLI:

  316.     fields: !!omap

  317.     - LM:

  318.         access: rw

  319.         description: AHB master select for loading the next LLI

  320.         lsb: 0

  321.         reset_value: '0'

  322.         width: 1

  323.     - LLI:

  324.         access: rw

  325.         description: Linked list item

  326.         lsb: 2

  327.         reset_value: '0x00000000'

  328.         width: 30

  329. - GPDMA_C5LLI:

  330.     fields: !!omap

  331.     - LM:

  332.         access: rw

  333.         description: AHB master select for loading the next LLI

  334.         lsb: 0

  335.         reset_value: '0'

  336.         width: 1

  337.     - LLI:

  338.         access: rw

  339.         description: Linked list item

  340.         lsb: 2

  341.         reset_value: '0x00000000'

  342.         width: 30

  343. - GPDMA_C6LLI:

  344.     fields: !!omap

  345.     - LM:

  346.         access: rw

  347.         description: AHB master select for loading the next LLI

  348.         lsb: 0

  349.         reset_value: '0'

  350.         width: 1

  351.     - LLI:

  352.         access: rw

  353.         description: Linked list item

  354.         lsb: 2

  355.         reset_value: '0x00000000'

  356.         width: 30

  357. - GPDMA_C7LLI:

  358.     fields: !!omap

  359.     - LM:

  360.         access: rw

  361.         description: AHB master select for loading the next LLI

  362.         lsb: 0

  363.         reset_value: '0'

  364.         width: 1

  365.     - LLI:

  366.         access: rw

  367.         description: Linked list item

  368.         lsb: 2

  369.         reset_value: '0x00000000'

  370.         width: 30

  371. - GPDMA_C0CONTROL:

  372.     fields: !!omap

  373.     - TRANSFERSIZE:

  374.         access: rw

  375.         description: Transfer size in number of transfers

  376.         lsb: 0

  377.         reset_value: '0x00'

  378.         width: 12

  379.     - SBSIZE:

  380.         access: rw

  381.         description: Source burst size

  382.         lsb: 12

  383.         reset_value: '0x0'

  384.         width: 3

  385.     - DBSIZE:

  386.         access: rw

  387.         description: Destination burst size

  388.         lsb: 15

  389.         reset_value: '0x0'

  390.         width: 3

  391.     - SWIDTH:

  392.         access: rw

  393.         description: Source transfer width

  394.         lsb: 18

  395.         reset_value: '0x0'

  396.         width: 3

  397.     - DWIDTH:

  398.         access: rw

  399.         description: Destination transfer width

  400.         lsb: 21

  401.         reset_value: '0x0'

  402.         width: 3

  403.     - S:

  404.         access: rw

  405.         description: Source AHB master select

  406.         lsb: 24

  407.         reset_value: '0'

  408.         width: 1

  409.     - D:

  410.         access: rw

  411.         description: Destination AHB master select

  412.         lsb: 25

  413.         reset_value: '0'

  414.         width: 1

  415.     - SI:

  416.         access: rw

  417.         description: Source increment

  418.         lsb: 26

  419.         reset_value: '0'

  420.         width: 1

  421.     - DI:

  422.         access: rw

  423.         description: Destination increment

  424.         lsb: 27

  425.         reset_value: '0'

  426.         width: 1

  427.     - PROT1:

  428.         access: rw

  429.         description: This information is provided to the peripheral during a DMA bus

  430.           access and indicates that the access is in user mode or privileged mode

  431.         lsb: 28

  432.         reset_value: '0'

  433.         width: 1

  434.     - PROT2:

  435.         access: rw

  436.         description: This information is provided to the peripheral during a DMA bus

  437.           access and indicates to the peripheral that the access is bufferable or

  438.           not bufferable

  439.         lsb: 29

  440.         reset_value: '0'

  441.         width: 1

  442.     - PROT3:

  443.         access: rw

  444.         description: This information is provided to the peripheral during a DMA bus

  445.           access and indicates to the peripheral that the access is cacheable or not

  446.           cacheable

  447.         lsb: 30

  448.         reset_value: '0'

  449.         width: 1

  450.     - I:

  451.         access: rw

  452.         description: Terminal count interrupt enable bit

  453.         lsb: 31

  454.         reset_value: '0'

  455.         width: 1

  456. - GPDMA_C1CONTROL:

  457.     fields: !!omap

  458.     - TRANSFERSIZE:

  459.         access: rw

  460.         description: Transfer size in number of transfers

  461.         lsb: 0

  462.         reset_value: '0x00'

  463.         width: 12

  464.     - SBSIZE:

  465.         access: rw

  466.         description: Source burst size

  467.         lsb: 12

  468.         reset_value: '0x0'

  469.         width: 3

  470.     - DBSIZE:

  471.         access: rw

  472.         description: Destination burst size

  473.         lsb: 15

  474.         reset_value: '0x0'

  475.         width: 3

  476.     - SWIDTH:

  477.         access: rw

  478.         description: Source transfer width

  479.         lsb: 18

  480.         reset_value: '0x0'

  481.         width: 3

  482.     - DWIDTH:

  483.         access: rw

  484.         description: Destination transfer width

  485.         lsb: 21

  486.         reset_value: '0x0'

  487.         width: 3

  488.     - S:

  489.         access: rw

  490.         description: Source AHB master select

  491.         lsb: 24

  492.         reset_value: '0'

  493.         width: 1

  494.     - D:

  495.         access: rw

  496.         description: Destination AHB master select

  497.         lsb: 25

  498.         reset_value: '0'

  499.         width: 1

  500.     - SI:

  501.         access: rw

  502.         description: Source increment

  503.         lsb: 26

  504.         reset_value: '0'

  505.         width: 1

  506.     - DI:

  507.         access: rw

  508.         description: Destination increment

  509.         lsb: 27

  510.         reset_value: '0'

  511.         width: 1

  512.     - PROT1:

  513.         access: rw

  514.         description: This information is provided to the peripheral during a DMA bus

  515.           access and indicates that the access is in user mode or privileged mode

  516.         lsb: 28

  517.         reset_value: '0'

  518.         width: 1

  519.     - PROT2:

  520.         access: rw

  521.         description: This information is provided to the peripheral during a DMA bus

  522.           access and indicates to the peripheral that the access is bufferable or

  523.           not bufferable

  524.         lsb: 29

  525.         reset_value: '0'

  526.         width: 1

  527.     - PROT3:

  528.         access: rw

  529.         description: This information is provided to the peripheral during a DMA bus

  530.           access and indicates to the peripheral that the access is cacheable or not

  531.           cacheable

  532.         lsb: 30

  533.         reset_value: '0'

  534.         width: 1

  535.     - I:

  536.         access: rw

  537.         description: Terminal count interrupt enable bit

  538.         lsb: 31

  539.         reset_value: '0'

  540.         width: 1

  541. - GPDMA_C2CONTROL:

  542.     fields: !!omap

  543.     - TRANSFERSIZE:

  544.         access: rw

  545.         description: Transfer size in number of transfers

  546.         lsb: 0

  547.         reset_value: '0x00'

  548.         width: 12

  549.     - SBSIZE:

  550.         access: rw

  551.         description: Source burst size

  552.         lsb: 12

  553.         reset_value: '0x0'

  554.         width: 3

  555.     - DBSIZE:

  556.         access: rw

  557.         description: Destination burst size

  558.         lsb: 15

  559.         reset_value: '0x0'

  560.         width: 3

  561.     - SWIDTH:

  562.         access: rw

  563.         description: Source transfer width

  564.         lsb: 18

  565.         reset_value: '0x0'

  566.         width: 3

  567.     - DWIDTH:

  568.         access: rw

  569.         description: Destination transfer width

  570.         lsb: 21

  571.         reset_value: '0x0'

  572.         width: 3

  573.     - S:

  574.         access: rw

  575.         description: Source AHB master select

  576.         lsb: 24

  577.         reset_value: '0'

  578.         width: 1

  579.     - D:

  580.         access: rw

  581.         description: Destination AHB master select

  582.         lsb: 25

  583.         reset_value: '0'

  584.         width: 1

  585.     - SI:

  586.         access: rw

  587.         description: Source increment

  588.         lsb: 26

  589.         reset_value: '0'

  590.         width: 1

  591.     - DI:

  592.         access: rw

  593.         description: Destination increment

  594.         lsb: 27

  595.         reset_value: '0'

  596.         width: 1

  597.     - PROT1:

  598.         access: rw

  599.         description: This information is provided to the peripheral during a DMA bus

  600.           access and indicates that the access is in user mode or privileged mode

  601.         lsb: 28

  602.         reset_value: '0'

  603.         width: 1

  604.     - PROT2:

  605.         access: rw

  606.         description: This information is provided to the peripheral during a DMA bus

  607.           access and indicates to the peripheral that the access is bufferable or

  608.           not bufferable

  609.         lsb: 29

  610.         reset_value: '0'

  611.         width: 1

  612.     - PROT3:

  613.         access: rw

  614.         description: This information is provided to the peripheral during a DMA bus

  615.           access and indicates to the peripheral that the access is cacheable or not

  616.           cacheable

  617.         lsb: 30

  618.         reset_value: '0'

  619.         width: 1

  620.     - I:

  621.         access: rw

  622.         description: Terminal count interrupt enable bit

  623.         lsb: 31

  624.         reset_value: '0'

  625.         width: 1

  626. - GPDMA_C3CONTROL:

  627.     fields: !!omap

  628.     - TRANSFERSIZE:

  629.         access: rw

  630.         description: Transfer size in number of transfers

  631.         lsb: 0

  632.         reset_value: '0x00'

  633.         width: 12

  634.     - SBSIZE:

  635.         access: rw

  636.         description: Source burst size

  637.         lsb: 12

  638.         reset_value: '0x0'

  639.         width: 3

  640.     - DBSIZE:

  641.         access: rw

  642.         description: Destination burst size

  643.         lsb: 15

  644.         reset_value: '0x0'

  645.         width: 3

  646.     - SWIDTH:

  647.         access: rw

  648.         description: Source transfer width

  649.         lsb: 18

  650.         reset_value: '0x0'

  651.         width: 3

  652.     - DWIDTH:

  653.         access: rw

  654.         description: Destination transfer width

  655.         lsb: 21

  656.         reset_value: '0x0'

  657.         width: 3

  658.     - S:

  659.         access: rw

  660.         description: Source AHB master select

  661.         lsb: 24

  662.         reset_value: '0'

  663.         width: 1

  664.     - D:

  665.         access: rw

  666.         description: Destination AHB master select

  667.         lsb: 25

  668.         reset_value: '0'

  669.         width: 1

  670.     - SI:

  671.         access: rw

  672.         description: Source increment

  673.         lsb: 26

  674.         reset_value: '0'

  675.         width: 1

  676.     - DI:

  677.         access: rw

  678.         description: Destination increment

  679.         lsb: 27

  680.         reset_value: '0'

  681.         width: 1

  682.     - PROT1:

  683.         access: rw

  684.         description: This information is provided to the peripheral during a DMA bus

  685.           access and indicates that the access is in user mode or privileged mode

  686.         lsb: 28

  687.         reset_value: '0'

  688.         width: 1

  689.     - PROT2:

  690.         access: rw

  691.         description: This information is provided to the peripheral during a DMA bus

  692.           access and indicates to the peripheral that the access is bufferable or

  693.           not bufferable

  694.         lsb: 29

  695.         reset_value: '0'

  696.         width: 1

  697.     - PROT3:

  698.         access: rw

  699.         description: This information is provided to the peripheral during a DMA bus

  700.           access and indicates to the peripheral that the access is cacheable or not

  701.           cacheable

  702.         lsb: 30

  703.         reset_value: '0'

  704.         width: 1

  705.     - I:

  706.         access: rw

  707.         description: Terminal count interrupt enable bit

  708.         lsb: 31

  709.         reset_value: '0'

  710.         width: 1

  711. - GPDMA_C4CONTROL:

  712.     fields: !!omap

  713.     - TRANSFERSIZE:

  714.         access: rw

  715.         description: Transfer size in number of transfers

  716.         lsb: 0

  717.         reset_value: '0x00'

  718.         width: 12

  719.     - SBSIZE:

  720.         access: rw

  721.         description: Source burst size

  722.         lsb: 12

  723.         reset_value: '0x0'

  724.         width: 3

  725.     - DBSIZE:

  726.         access: rw

  727.         description: Destination burst size

  728.         lsb: 15

  729.         reset_value: '0x0'

  730.         width: 3

  731.     - SWIDTH:

  732.         access: rw

  733.         description: Source transfer width

  734.         lsb: 18

  735.         reset_value: '0x0'

  736.         width: 3

  737.     - DWIDTH:

  738.         access: rw

  739.         description: Destination transfer width

  740.         lsb: 21

  741.         reset_value: '0x0'

  742.         width: 3

  743.     - S:

  744.         access: rw

  745.         description: Source AHB master select

  746.         lsb: 24

  747.         reset_value: '0'

  748.         width: 1

  749.     - D:

  750.         access: rw

  751.         description: Destination AHB master select

  752.         lsb: 25

  753.         reset_value: '0'

  754.         width: 1

  755.     - SI:

  756.         access: rw

  757.         description: Source increment

  758.         lsb: 26

  759.         reset_value: '0'

  760.         width: 1

  761.     - DI:

  762.         access: rw

  763.         description: Destination increment

  764.         lsb: 27

  765.         reset_value: '0'

  766.         width: 1

  767.     - PROT1:

  768.         access: rw

  769.         description: This information is provided to the peripheral during a DMA bus

  770.           access and indicates that the access is in user mode or privileged mode

  771.         lsb: 28

  772.         reset_value: '0'

  773.         width: 1

  774.     - PROT2:

  775.         access: rw

  776.         description: This information is provided to the peripheral during a DMA bus

  777.           access and indicates to the peripheral that the access is bufferable or

  778.           not bufferable

  779.         lsb: 29

  780.         reset_value: '0'

  781.         width: 1

  782.     - PROT3:

  783.         access: rw

  784.         description: This information is provided to the peripheral during a DMA bus

  785.           access and indicates to the peripheral that the access is cacheable or not

  786.           cacheable

  787.         lsb: 30

  788.         reset_value: '0'

  789.         width: 1

  790.     - I:

  791.         access: rw

  792.         description: Terminal count interrupt enable bit

  793.         lsb: 31

  794.         reset_value: '0'

  795.         width: 1

  796. - GPDMA_C5CONTROL:

  797.     fields: !!omap

  798.     - TRANSFERSIZE:

  799.         access: rw

  800.         description: Transfer size in number of transfers

  801.         lsb: 0

  802.         reset_value: '0x00'

  803.         width: 12

  804.     - SBSIZE:

  805.         access: rw

  806.         description: Source burst size

  807.         lsb: 12

  808.         reset_value: '0x0'

  809.         width: 3

  810.     - DBSIZE:

  811.         access: rw

  812.         description: Destination burst size

  813.         lsb: 15

  814.         reset_value: '0x0'

  815.         width: 3

  816.     - SWIDTH:

  817.         access: rw

  818.         description: Source transfer width

  819.         lsb: 18

  820.         reset_value: '0x0'

  821.         width: 3

  822.     - DWIDTH:

  823.         access: rw

  824.         description: Destination transfer width

  825.         lsb: 21

  826.         reset_value: '0x0'

  827.         width: 3

  828.     - S:

  829.         access: rw

  830.         description: Source AHB master select

  831.         lsb: 24

  832.         reset_value: '0'

  833.         width: 1

  834.     - D:

  835.         access: rw

  836.         description: Destination AHB master select

  837.         lsb: 25

  838.         reset_value: '0'

  839.         width: 1

  840.     - SI:

  841.         access: rw

  842.         description: Source increment

  843.         lsb: 26

  844.         reset_value: '0'

  845.         width: 1

  846.     - DI:

  847.         access: rw

  848.         description: Destination increment

  849.         lsb: 27

  850.         reset_value: '0'

  851.         width: 1

  852.     - PROT1:

  853.         access: rw

  854.         description: This information is provided to the peripheral during a DMA bus

  855.           access and indicates that the access is in user mode or privileged mode

  856.         lsb: 28

  857.         reset_value: '0'

  858.         width: 1

  859.     - PROT2:

  860.         access: rw

  861.         description: This information is provided to the peripheral during a DMA bus

  862.           access and indicates to the peripheral that the access is bufferable or

  863.           not bufferable

  864.         lsb: 29

  865.         reset_value: '0'

  866.         width: 1

  867.     - PROT3:

  868.         access: rw

  869.         description: This information is provided to the peripheral during a DMA bus

  870.           access and indicates to the peripheral that the access is cacheable or not

  871.           cacheable

  872.         lsb: 30

  873.         reset_value: '0'

  874.         width: 1

  875.     - I:

  876.         access: rw

  877.         description: Terminal count interrupt enable bit

  878.         lsb: 31

  879.         reset_value: '0'

  880.         width: 1

  881. - GPDMA_C6CONTROL:

  882.     fields: !!omap

  883.     - TRANSFERSIZE:

  884.         access: rw

  885.         description: Transfer size in number of transfers

  886.         lsb: 0

  887.         reset_value: '0x00'

  888.         width: 12

  889.     - SBSIZE:

  890.         access: rw

  891.         description: Source burst size

  892.         lsb: 12

  893.         reset_value: '0x0'

  894.         width: 3

  895.     - DBSIZE:

  896.         access: rw

  897.         description: Destination burst size

  898.         lsb: 15

  899.         reset_value: '0x0'

  900.         width: 3

  901.     - SWIDTH:

  902.         access: rw

  903.         description: Source transfer width

  904.         lsb: 18

  905.         reset_value: '0x0'

  906.         width: 3

  907.     - DWIDTH:

  908.         access: rw

  909.         description: Destination transfer width

  910.         lsb: 21

  911.         reset_value: '0x0'

  912.         width: 3

  913.     - S:

  914.         access: rw

  915.         description: Source AHB master select

  916.         lsb: 24

  917.         reset_value: '0'

  918.         width: 1

  919.     - D:

  920.         access: rw

  921.         description: Destination AHB master select

  922.         lsb: 25

  923.         reset_value: '0'

  924.         width: 1

  925.     - SI:

  926.         access: rw

  927.         description: Source increment

  928.         lsb: 26

  929.         reset_value: '0'

  930.         width: 1

  931.     - DI:

  932.         access: rw

  933.         description: Destination increment

  934.         lsb: 27

  935.         reset_value: '0'

  936.         width: 1

  937.     - PROT1:

  938.         access: rw

  939.         description: This information is provided to the peripheral during a DMA bus

  940.           access and indicates that the access is in user mode or privileged mode

  941.         lsb: 28

  942.         reset_value: '0'

  943.         width: 1

  944.     - PROT2:

  945.         access: rw

  946.         description: This information is provided to the peripheral during a DMA bus

  947.           access and indicates to the peripheral that the access is bufferable or

  948.           not bufferable

  949.         lsb: 29

  950.         reset_value: '0'

  951.         width: 1

  952.     - PROT3:

  953.         access: rw

  954.         description: This information is provided to the peripheral during a DMA bus

  955.           access and indicates to the peripheral that the access is cacheable or not

  956.           cacheable

  957.         lsb: 30

  958.         reset_value: '0'

  959.         width: 1

  960.     - I:

  961.         access: rw

  962.         description: Terminal count interrupt enable bit

  963.         lsb: 31

  964.         reset_value: '0'

  965.         width: 1

  966. - GPDMA_C7CONTROL:

  967.     fields: !!omap

  968.     - TRANSFERSIZE:

  969.         access: rw

  970.         description: Transfer size in number of transfers

  971.         lsb: 0

  972.         reset_value: '0x00'

  973.         width: 12

  974.     - SBSIZE:

  975.         access: rw

  976.         description: Source burst size

  977.         lsb: 12

  978.         reset_value: '0x0'

  979.         width: 3

  980.     - DBSIZE:

  981.         access: rw

  982.         description: Destination burst size

  983.         lsb: 15

  984.         reset_value: '0x0'

  985.         width: 3

  986.     - SWIDTH:

  987.         access: rw

  988.         description: Source transfer width

  989.         lsb: 18

  990.         reset_value: '0x0'

  991.         width: 3

  992.     - DWIDTH:

  993.         access: rw

  994.         description: Destination transfer width

  995.         lsb: 21

  996.         reset_value: '0x0'

  997.         width: 3

  998.     - S:

  999.         access: rw

  1000.         description: Source AHB master select

  1001.         lsb: 24

  1002.         reset_value: '0'

  1003.         width: 1

  1004.     - D:

  1005.         access: rw

  1006.         description: Destination AHB master select

  1007.         lsb: 25

  1008.         reset_value: '0'

  1009.         width: 1

  1010.     - SI:

  1011.         access: rw

  1012.         description: Source increment

  1013.         lsb: 26

  1014.         reset_value: '0'

  1015.         width: 1

  1016.     - DI:

  1017.         access: rw

  1018.         description: Destination increment

  1019.         lsb: 27

  1020.         reset_value: '0'

  1021.         width: 1

  1022.     - PROT1:

  1023.         access: rw

  1024.         description: This information is provided to the peripheral during a DMA bus

  1025.           access and indicates that the access is in user mode or privileged mode

  1026.         lsb: 28

  1027.         reset_value: '0'

  1028.         width: 1

  1029.     - PROT2:

  1030.         access: rw

  1031.         description: This information is provided to the peripheral during a DMA bus

  1032.           access and indicates to the peripheral that the access is bufferable or

  1033.           not bufferable

  1034.         lsb: 29

  1035.         reset_value: '0'

  1036.         width: 1

  1037.     - PROT3:

  1038.         access: rw

  1039.         description: This information is provided to the peripheral during a DMA bus

  1040.           access and indicates to the peripheral that the access is cacheable or not

  1041.           cacheable

  1042.         lsb: 30

  1043.         reset_value: '0'

  1044.         width: 1

  1045.     - I:

  1046.         access: rw

  1047.         description: Terminal count interrupt enable bit

  1048.         lsb: 31

  1049.         reset_value: '0'

  1050.         width: 1

  1051. - GPDMA_C0CONFIG:

  1052.     fields: !!omap

  1053.     - E:

  1054.         access: rw

  1055.         description: Channel enable

  1056.         lsb: 0

  1057.         reset_value: '0'

  1058.         width: 1

  1059.     - SRCPERIPHERAL:

  1060.         access: rw

  1061.         description: Source peripheral

  1062.         lsb: 1

  1063.         reset_value: ''

  1064.         width: 5

  1065.     - DESTPERIPHERAL:

  1066.         access: rw

  1067.         description: Destination peripheral

  1068.         lsb: 6

  1069.         reset_value: ''

  1070.         width: 5

  1071.     - FLOWCNTRL:

  1072.         access: rw

  1073.         description: Flow control and transfer type

  1074.         lsb: 11

  1075.         reset_value: ''

  1076.         width: 3

  1077.     - IE:

  1078.         access: rw

  1079.         description: Interrupt error mask

  1080.         lsb: 14

  1081.         reset_value: ''

  1082.         width: 1

  1083.     - ITC:

  1084.         access: rw

  1085.         description: Terminal count interrupt mask

  1086.         lsb: 15

  1087.         reset_value: ''

  1088.         width: 1

  1089.     - L:

  1090.         access: rw

  1091.         description: Lock

  1092.         lsb: 16

  1093.         reset_value: ''

  1094.         width: 1

  1095.     - A:

  1096.         access: r

  1097.         description: Active

  1098.         lsb: 17

  1099.         reset_value: ''

  1100.         width: 1

  1101.     - H:

  1102.         access: rw

  1103.         description: Halt

  1104.         lsb: 18

  1105.         reset_value: ''

  1106.         width: 1

  1107. - GPDMA_C1CONFIG:

  1108.     fields: !!omap

  1109.     - E:

  1110.         access: rw

  1111.         description: Channel enable

  1112.         lsb: 0

  1113.         reset_value: '0'

  1114.         width: 1

  1115.     - SRCPERIPHERAL:

  1116.         access: rw

  1117.         description: Source peripheral

  1118.         lsb: 1

  1119.         reset_value: ''

  1120.         width: 5

  1121.     - DESTPERIPHERAL:

  1122.         access: rw

  1123.         description: Destination peripheral

  1124.         lsb: 6

  1125.         reset_value: ''

  1126.         width: 5

  1127.     - FLOWCNTRL:

  1128.         access: rw

  1129.         description: Flow control and transfer type

  1130.         lsb: 11

  1131.         reset_value: ''

  1132.         width: 3

  1133.     - IE:

  1134.         access: rw

  1135.         description: Interrupt error mask

  1136.         lsb: 14

  1137.         reset_value: ''

  1138.         width: 1

  1139.     - ITC:

  1140.         access: rw

  1141.         description: Terminal count interrupt mask

  1142.         lsb: 15

  1143.         reset_value: ''

  1144.         width: 1

  1145.     - L:

  1146.         access: rw

  1147.         description: Lock

  1148.         lsb: 16

  1149.         reset_value: ''

  1150.         width: 1

  1151.     - A:

  1152.         access: r

  1153.         description: Active

  1154.         lsb: 17

  1155.         reset_value: ''

  1156.         width: 1

  1157.     - H:

  1158.         access: rw

  1159.         description: Halt

  1160.         lsb: 18

  1161.         reset_value: ''

  1162.         width: 1

  1163. - GPDMA_C2CONFIG:

  1164.     fields: !!omap

  1165.     - E:

  1166.         access: rw

  1167.         description: Channel enable

  1168.         lsb: 0

  1169.         reset_value: '0'

  1170.         width: 1

  1171.     - SRCPERIPHERAL:

  1172.         access: rw

  1173.         description: Source peripheral

  1174.         lsb: 1

  1175.         reset_value: ''

  1176.         width: 5

  1177.     - DESTPERIPHERAL:

  1178.         access: rw

  1179.         description: Destination peripheral

  1180.         lsb: 6

  1181.         reset_value: ''

  1182.         width: 5

  1183.     - FLOWCNTRL:

  1184.         access: rw

  1185.         description: Flow control and transfer type

  1186.         lsb: 11

  1187.         reset_value: ''

  1188.         width: 3

  1189.     - IE:

  1190.         access: rw

  1191.         description: Interrupt error mask

  1192.         lsb: 14

  1193.         reset_value: ''

  1194.         width: 1

  1195.     - ITC:

  1196.         access: rw

  1197.         description: Terminal count interrupt mask

  1198.         lsb: 15

  1199.         reset_value: ''

  1200.         width: 1

  1201.     - L:

  1202.         access: rw

  1203.         description: Lock

  1204.         lsb: 16

  1205.         reset_value: ''

  1206.         width: 1

  1207.     - A:

  1208.         access: r

  1209.         description: Active

  1210.         lsb: 17

  1211.         reset_value: ''

  1212.         width: 1

  1213.     - H:

  1214.         access: rw

  1215.         description: Halt

  1216.         lsb: 18

  1217.         reset_value: ''

  1218.         width: 1

  1219. - GPDMA_C3CONFIG:

  1220.     fields: !!omap

  1221.     - E:

  1222.         access: rw

  1223.         description: Channel enable

  1224.         lsb: 0

  1225.         reset_value: '0'

  1226.         width: 1

  1227.     - SRCPERIPHERAL:

  1228.         access: rw

  1229.         description: Source peripheral

  1230.         lsb: 1

  1231.         reset_value: ''

  1232.         width: 5

  1233.     - DESTPERIPHERAL:

  1234.         access: rw

  1235.         description: Destination peripheral

  1236.         lsb: 6

  1237.         reset_value: ''

  1238.         width: 5

  1239.     - FLOWCNTRL:

  1240.         access: rw

  1241.         description: Flow control and transfer type

  1242.         lsb: 11

  1243.         reset_value: ''

  1244.         width: 3

  1245.     - IE:

  1246.         access: rw

  1247.         description: Interrupt error mask

  1248.         lsb: 14

  1249.         reset_value: ''

  1250.         width: 1

  1251.     - ITC:

  1252.         access: rw

  1253.         description: Terminal count interrupt mask

  1254.         lsb: 15

  1255.         reset_value: ''

  1256.         width: 1

  1257.     - L:

  1258.         access: rw

  1259.         description: Lock

  1260.         lsb: 16

  1261.         reset_value: ''

  1262.         width: 1

  1263.     - A:

  1264.         access: r

  1265.         description: Active

  1266.         lsb: 17

  1267.         reset_value: ''

  1268.         width: 1

  1269.     - H:

  1270.         access: rw

  1271.         description: Halt

  1272.         lsb: 18

  1273.         reset_value: ''

  1274.         width: 1

  1275. - GPDMA_C4CONFIG:

  1276.     fields: !!omap

  1277.     - E:

  1278.         access: rw

  1279.         description: Channel enable

  1280.         lsb: 0

  1281.         reset_value: '0'

  1282.         width: 1

  1283.     - SRCPERIPHERAL:

  1284.         access: rw

  1285.         description: Source peripheral

  1286.         lsb: 1

  1287.         reset_value: ''

  1288.         width: 5

  1289.     - DESTPERIPHERAL:

  1290.         access: rw

  1291.         description: Destination peripheral

  1292.         lsb: 6

  1293.         reset_value: ''

  1294.         width: 5

  1295.     - FLOWCNTRL:

  1296.         access: rw

  1297.         description: Flow control and transfer type

  1298.         lsb: 11

  1299.         reset_value: ''

  1300.         width: 3

  1301.     - IE:

  1302.         access: rw

  1303.         description: Interrupt error mask

  1304.         lsb: 14

  1305.         reset_value: ''

  1306.         width: 1

  1307.     - ITC:

  1308.         access: rw

  1309.         description: Terminal count interrupt mask

  1310.         lsb: 15

  1311.         reset_value: ''

  1312.         width: 1

  1313.     - L:

  1314.         access: rw

  1315.         description: Lock

  1316.         lsb: 16

  1317.         reset_value: ''

  1318.         width: 1

  1319.     - A:

  1320.         access: r

  1321.         description: Active

  1322.         lsb: 17

  1323.         reset_value: ''

  1324.         width: 1

  1325.     - H:

  1326.         access: rw

  1327.         description: Halt

  1328.         lsb: 18

  1329.         reset_value: ''

  1330.         width: 1

  1331. - GPDMA_C5CONFIG:

  1332.     fields: !!omap

  1333.     - E:

  1334.         access: rw

  1335.         description: Channel enable

  1336.         lsb: 0

  1337.         reset_value: '0'

  1338.         width: 1

  1339.     - SRCPERIPHERAL:

  1340.         access: rw

  1341.         description: Source peripheral

  1342.         lsb: 1

  1343.         reset_value: ''

  1344.         width: 5

  1345.     - DESTPERIPHERAL:

  1346.         access: rw

  1347.         description: Destination peripheral

  1348.         lsb: 6

  1349.         reset_value: ''

  1350.         width: 5

  1351.     - FLOWCNTRL:

  1352.         access: rw

  1353.         description: Flow control and transfer type

  1354.         lsb: 11

  1355.         reset_value: ''

  1356.         width: 3

  1357.     - IE:

  1358.         access: rw

  1359.         description: Interrupt error mask

  1360.         lsb: 14

  1361.         reset_value: ''

  1362.         width: 1

  1363.     - ITC:

  1364.         access: rw

  1365.         description: Terminal count interrupt mask

  1366.         lsb: 15

  1367.         reset_value: ''

  1368.         width: 1

  1369.     - L:

  1370.         access: rw

  1371.         description: Lock

  1372.         lsb: 16

  1373.         reset_value: ''

  1374.         width: 1

  1375.     - A:

  1376.         access: r

  1377.         description: Active

  1378.         lsb: 17

  1379.         reset_value: ''

  1380.         width: 1

  1381.     - H:

  1382.         access: rw

  1383.         description: Halt

  1384.         lsb: 18

  1385.         reset_value: ''

  1386.         width: 1

  1387. - GPDMA_C6CONFIG:

  1388.     fields: !!omap

  1389.     - E:

  1390.         access: rw

  1391.         description: Channel enable

  1392.         lsb: 0

  1393.         reset_value: '0'

  1394.         width: 1

  1395.     - SRCPERIPHERAL:

  1396.         access: rw

  1397.         description: Source peripheral

  1398.         lsb: 1

  1399.         reset_value: ''

  1400.         width: 5

  1401.     - DESTPERIPHERAL:

  1402.         access: rw

  1403.         description: Destination peripheral

  1404.         lsb: 6

  1405.         reset_value: ''

  1406.         width: 5

  1407.     - FLOWCNTRL:

  1408.         access: rw

  1409.         description: Flow control and transfer type

  1410.         lsb: 11

  1411.         reset_value: ''

  1412.         width: 3

  1413.     - IE:

  1414.         access: rw

  1415.         description: Interrupt error mask

  1416.         lsb: 14

  1417.         reset_value: ''

  1418.         width: 1

  1419.     - ITC:

  1420.         access: rw

  1421.         description: Terminal count interrupt mask

  1422.         lsb: 15

  1423.         reset_value: ''

  1424.         width: 1

  1425.     - L:

  1426.         access: rw

  1427.         description: Lock

  1428.         lsb: 16

  1429.         reset_value: ''

  1430.         width: 1

  1431.     - A:

  1432.         access: r

  1433.         description: Active

  1434.         lsb: 17

  1435.         reset_value: ''

  1436.         width: 1

  1437.     - H:

  1438.         access: rw

  1439.         description: Halt

  1440.         lsb: 18

  1441.         reset_value: ''

  1442.         width: 1

  1443. - GPDMA_C7CONFIG:

  1444.     fields: !!omap

  1445.     - E:

  1446.         access: rw

  1447.         description: Channel enable

  1448.         lsb: 0

  1449.         reset_value: '0'

  1450.         width: 1

  1451.     - SRCPERIPHERAL:

  1452.         access: rw

  1453.         description: Source peripheral

  1454.         lsb: 1

  1455.         reset_value: ''

  1456.         width: 5

  1457.     - DESTPERIPHERAL:

  1458.         access: rw

  1459.         description: Destination peripheral

  1460.         lsb: 6

  1461.         reset_value: ''

  1462.         width: 5

  1463.     - FLOWCNTRL:

  1464.         access: rw

  1465.         description: Flow control and transfer type

  1466.         lsb: 11

  1467.         reset_value: ''

  1468.         width: 3

  1469.     - IE:

  1470.         access: rw

  1471.         description: Interrupt error mask

  1472.         lsb: 14

  1473.         reset_value: ''

  1474.         width: 1

  1475.     - ITC:

  1476.         access: rw

  1477.         description: Terminal count interrupt mask

  1478.         lsb: 15

  1479.         reset_value: ''

  1480.         width: 1

  1481.     - L:

  1482.         access: rw

  1483.         description: Lock

  1484.         lsb: 16

  1485.         reset_value: ''

  1486.         width: 1

  1487.     - A:

  1488.         access: r

  1489.         description: Active

  1490.         lsb: 17

  1491.         reset_value: ''

  1492.         width: 1

  1493.     - H:

  1494.         access: rw

  1495.         description: Halt

  1496.         lsb: 18

  1497.         reset_value: ''

  1498.         width: 1