124 lines
3.5 KiB
C
124 lines
3.5 KiB
C
/** @addtogroup adc_file ADC peripheral API
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@ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly 2012
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Ken Sarkies <ksarkies@internode.on.net>
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@date 30 August 2012
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/adc.h>
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/**@{*/
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/*---------------------------------------------------------------------------*/
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/** @brief ADC Set the Sample Time for a Single Channel
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The sampling time can be selected in ADC clock cycles from 1.5 to 239.5.
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@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
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@param[in] channel Unsigned int8. ADC Channel integer 0..18 or from @ref
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adc_channel
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@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg
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* NOTE Common with f1, f2 and f37x
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*/
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void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time)
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{
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uint32_t reg32;
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if (channel < 10) {
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reg32 = ADC_SMPR2(adc);
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reg32 &= ~(0x7 << (channel * 3));
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reg32 |= (time << (channel * 3));
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ADC_SMPR2(adc) = reg32;
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} else {
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reg32 = ADC_SMPR1(adc);
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reg32 &= ~(0x7 << ((channel - 10) * 3));
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reg32 |= (time << ((channel - 10) * 3));
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ADC_SMPR1(adc) = reg32;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief ADC Set the Sample Time for All Channels
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The sampling time can be selected in ADC clock cycles from 1.5 to 239.5, same
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for all channels.
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@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
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@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg
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* NOTE Common with f1, f2 and f37x
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*/
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void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
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{
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uint8_t i;
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uint32_t reg32 = 0;
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for (i = 0; i <= 9; i++) {
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reg32 |= (time << (i * 3));
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}
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ADC_SMPR2(adc) = reg32;
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for (i = 10; i <= 17; i++) {
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reg32 |= (time << ((i - 10) * 3));
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}
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ADC_SMPR1(adc) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief ADC Set Dual/Triple Mode
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The multiple mode uses ADC1 as master, ADC2 and optionally ADC3 in a slave
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arrangement. This setting is applied to ADC1 only.
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The various modes possible are described in the reference manual.
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@param[in] mode Unsigned int32. Multiple mode selection from @ref adc_multi_mode
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*/
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void adc_set_multi_mode(uint32_t mode)
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{
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ADC_CCR |= mode;
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}
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/** Enable The VBat Sensor.
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* This enables the battery voltage measurements on ADC1 channel 18. On
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* STM32F42x and STM32F43x, this must be disabled when the temperature sensor
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* is enabled. If both are enabled, only the VBat conversion is performed.
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*/
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void adc_enable_vbat_sensor(void)
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{
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ADC_CCR |= ADC_CCR_VBATE;
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}
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/** Disable The VBat Sensor.
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* Disabling this will reduce power consumption from the battery voltage
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* measurement.
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*/
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void adc_disable_vbat_sensor(void)
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{
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ADC_CCR &= ~ADC_CCR_VBATE;
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}
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/**@}*/ |