mirror of
https://github.com/henrydcase/nobs.git
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282 lines
6.9 KiB
ArmAsm
282 lines
6.9 KiB
ArmAsm
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// Copyright 2017 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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#include "textflag.h"
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DATA rotInvSRows<>+0x00(SB)/8, $0x080f0205040b0e01
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DATA rotInvSRows<>+0x08(SB)/8, $0x00070a0d0c030609
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GLOBL rotInvSRows<>(SB), (NOPTR+RODATA), $16
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DATA invSRows<>+0x00(SB)/8, $0x0b0e0104070a0d00
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DATA invSRows<>+0x08(SB)/8, $0x0306090c0f020508
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GLOBL invSRows<>(SB), (NOPTR+RODATA), $16
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// func encryptBlockAsm(nr int, xk *uint32, dst, src *byte)
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TEXT ·encryptBlockAsm(SB),NOSPLIT,$0
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MOVD nr+0(FP), R9
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MOVD xk+8(FP), R10
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MOVD dst+16(FP), R11
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MOVD src+24(FP), R12
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VLD1 (R12), [V0.B16]
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CMP $12, R9
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BLT enc128
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BEQ enc196
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enc256:
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VLD1.P 32(R10), [V1.B16, V2.B16]
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AESE V1.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V2.B16, V0.B16
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AESMC V0.B16, V0.B16
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enc196:
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VLD1.P 32(R10), [V3.B16, V4.B16]
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AESE V3.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V4.B16, V0.B16
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AESMC V0.B16, V0.B16
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enc128:
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VLD1.P 64(R10), [V5.B16, V6.B16, V7.B16, V8.B16]
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VLD1.P 64(R10), [V9.B16, V10.B16, V11.B16, V12.B16]
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VLD1.P 48(R10), [V13.B16, V14.B16, V15.B16]
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AESE V5.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V6.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V7.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V8.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V9.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V10.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V11.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V12.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V13.B16, V0.B16
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AESMC V0.B16, V0.B16
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AESE V14.B16, V0.B16
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VEOR V0.B16, V15.B16, V0.B16
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VST1 [V0.B16], (R11)
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RET
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// func decryptBlockAsm(nr int, xk *uint32, dst, src *byte)
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TEXT ·decryptBlockAsm(SB),NOSPLIT,$0
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MOVD nr+0(FP), R9
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MOVD xk+8(FP), R10
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MOVD dst+16(FP), R11
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MOVD src+24(FP), R12
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VLD1 (R12), [V0.B16]
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CMP $12, R9
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BLT dec128
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BEQ dec196
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dec256:
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VLD1.P 32(R10), [V1.B16, V2.B16]
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AESD V1.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V2.B16, V0.B16
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AESIMC V0.B16, V0.B16
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dec196:
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VLD1.P 32(R10), [V3.B16, V4.B16]
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AESD V3.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V4.B16, V0.B16
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AESIMC V0.B16, V0.B16
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dec128:
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VLD1.P 64(R10), [V5.B16, V6.B16, V7.B16, V8.B16]
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VLD1.P 64(R10), [V9.B16, V10.B16, V11.B16, V12.B16]
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VLD1.P 48(R10), [V13.B16, V14.B16, V15.B16]
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AESD V5.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V6.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V7.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V8.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V9.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V10.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V11.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V12.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V13.B16, V0.B16
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AESIMC V0.B16, V0.B16
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AESD V14.B16, V0.B16
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VEOR V0.B16, V15.B16, V0.B16
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VST1 [V0.B16], (R11)
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RET
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// func expandKeyAsm(nr int, key *byte, enc, dec *uint32) {
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// Note that round keys are stored in uint128 format, not uint32
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TEXT ·expandKeyAsm(SB),NOSPLIT,$0
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MOVD nr+0(FP), R8
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MOVD key+8(FP), R9
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MOVD enc+16(FP), R10
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MOVD dec+24(FP), R11
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LDP rotInvSRows<>(SB), (R0, R1)
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VMOV R0, V3.D[0]
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VMOV R1, V3.D[1]
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VEOR V0.B16, V0.B16, V0.B16 // All zeroes
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MOVW $1, R13
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TBZ $1, R8, ks192
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TBNZ $2, R8, ks256
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LDPW (R9), (R4, R5)
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LDPW 8(R9), (R6, R7)
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STPW.P (R4, R5), 8(R10)
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STPW.P (R6, R7), 8(R10)
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MOVW $0x1b, R14
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ks128Loop:
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VMOV R7, V2.S[0]
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WORD $0x4E030042 // TBL V3.B16, [V2.B16], V2.B16
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AESE V0.B16, V2.B16 // Use AES to compute the SBOX
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EORW R13, R4
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LSLW $1, R13 // Compute next Rcon
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ANDSW $0x100, R13, ZR
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CSELW NE, R14, R13, R13 // Fake modulo
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SUBS $1, R8
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VMOV V2.S[0], R0
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EORW R0, R4
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EORW R4, R5
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EORW R5, R6
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EORW R6, R7
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STPW.P (R4, R5), 8(R10)
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STPW.P (R6, R7), 8(R10)
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BNE ks128Loop
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CBZ R11, ksDone // If dec is nil we are done
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SUB $176, R10
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// Decryption keys are encryption keys with InverseMixColumns applied
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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VMOV V0.B16, V7.B16
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AESIMC V1.B16, V6.B16
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AESIMC V2.B16, V5.B16
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AESIMC V3.B16, V4.B16
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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AESIMC V0.B16, V11.B16
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AESIMC V1.B16, V10.B16
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AESIMC V2.B16, V9.B16
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AESIMC V3.B16, V8.B16
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VLD1 (R10), [V0.B16, V1.B16, V2.B16]
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AESIMC V0.B16, V14.B16
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AESIMC V1.B16, V13.B16
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VMOV V2.B16, V12.B16
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VST1.P [V12.B16, V13.B16, V14.B16], 48(R11)
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VST1.P [V8.B16, V9.B16, V10.B16, V11.B16], 64(R11)
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VST1 [V4.B16, V5.B16, V6.B16, V7.B16], (R11)
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B ksDone
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ks192:
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LDPW (R9), (R2, R3)
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LDPW 8(R9), (R4, R5)
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LDPW 16(R9), (R6, R7)
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STPW.P (R2, R3), 8(R10)
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STPW.P (R4, R5), 8(R10)
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SUB $4, R8
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ks192Loop:
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STPW.P (R6, R7), 8(R10)
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VMOV R7, V2.S[0]
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WORD $0x4E030042 //TBL V3.B16, [V2.B16], V2.B16
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AESE V0.B16, V2.B16
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EORW R13, R2
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LSLW $1, R13
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SUBS $1, R8
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VMOV V2.S[0], R0
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EORW R0, R2
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EORW R2, R3
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EORW R3, R4
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EORW R4, R5
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EORW R5, R6
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EORW R6, R7
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STPW.P (R2, R3), 8(R10)
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STPW.P (R4, R5), 8(R10)
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BNE ks192Loop
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CBZ R11, ksDone
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SUB $208, R10
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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VMOV V0.B16, V7.B16
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AESIMC V1.B16, V6.B16
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AESIMC V2.B16, V5.B16
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AESIMC V3.B16, V4.B16
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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AESIMC V0.B16, V11.B16
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AESIMC V1.B16, V10.B16
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AESIMC V2.B16, V9.B16
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AESIMC V3.B16, V8.B16
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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AESIMC V0.B16, V15.B16
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AESIMC V1.B16, V14.B16
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AESIMC V2.B16, V13.B16
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AESIMC V3.B16, V12.B16
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VLD1 (R10), [V0.B16]
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VST1.P [V0.B16], 16(R11)
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VST1.P [V12.B16, V13.B16, V14.B16, V15.B16], 64(R11)
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VST1.P [V8.B16, V9.B16, V10.B16, V11.B16], 64(R11)
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VST1 [V4.B16, V5.B16, V6.B16, V7.B16], (R11)
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B ksDone
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ks256:
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LDP invSRows<>(SB), (R0, R1)
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VMOV R0, V4.D[0]
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VMOV R1, V4.D[1]
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LDPW (R9), (R0, R1)
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LDPW 8(R9), (R2, R3)
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LDPW 16(R9), (R4, R5)
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LDPW 24(R9), (R6, R7)
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STPW.P (R0, R1), 8(R10)
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STPW.P (R2, R3), 8(R10)
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SUB $7, R8
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ks256Loop:
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STPW.P (R4, R5), 8(R10)
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STPW.P (R6, R7), 8(R10)
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VMOV R7, V2.S[0]
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WORD $0x4E030042 //TBL V3.B16, [V2.B16], V2.B16
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AESE V0.B16, V2.B16
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EORW R13, R0
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LSLW $1, R13
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SUBS $1, R8
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VMOV V2.S[0], R9
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EORW R9, R0
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EORW R0, R1
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EORW R1, R2
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EORW R2, R3
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VMOV R3, V2.S[0]
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WORD $0x4E040042 //TBL V3.B16, [V2.B16], V2.B16
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AESE V0.B16, V2.B16
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VMOV V2.S[0], R9
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EORW R9, R4
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EORW R4, R5
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EORW R5, R6
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EORW R6, R7
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STPW.P (R0, R1), 8(R10)
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STPW.P (R2, R3), 8(R10)
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BNE ks256Loop
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CBZ R11, ksDone
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SUB $240, R10
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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VMOV V0.B16, V7.B16
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AESIMC V1.B16, V6.B16
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AESIMC V2.B16, V5.B16
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AESIMC V3.B16, V4.B16
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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AESIMC V0.B16, V11.B16
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AESIMC V1.B16, V10.B16
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AESIMC V2.B16, V9.B16
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AESIMC V3.B16, V8.B16
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VLD1.P 64(R10), [V0.B16, V1.B16, V2.B16, V3.B16]
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AESIMC V0.B16, V15.B16
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AESIMC V1.B16, V14.B16
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AESIMC V2.B16, V13.B16
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AESIMC V3.B16, V12.B16
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VLD1 (R10), [V0.B16, V1.B16, V2.B16]
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AESIMC V0.B16, V18.B16
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AESIMC V1.B16, V17.B16
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VMOV V2.B16, V16.B16
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VST1.P [V16.B16, V17.B16, V18.B16], 48(R11)
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VST1.P [V12.B16, V13.B16, V14.B16, V15.B16], 64(R11)
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VST1.P [V8.B16, V9.B16, V10.B16, V11.B16], 64(R11)
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VST1 [V4.B16, V5.B16, V6.B16, V7.B16], (R11)
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ksDone:
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RET
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