|
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415 |
- !!omap
- - I2C0_CONSET:
- fields: !!omap
- - AA:
- access: rw
- description: Assert acknowledge flag
- lsb: 2
- reset_value: '0'
- width: 1
- - SI:
- access: rw
- description: I2C interrupt flag
- lsb: 3
- reset_value: '0'
- width: 1
- - STO:
- access: rw
- description: STOP flag
- lsb: 4
- reset_value: '0'
- width: 1
- - STA:
- access: rw
- description: START flag
- lsb: 5
- reset_value: '0'
- width: 1
- - I2EN:
- access: rw
- description: I2C interface enable
- lsb: 6
- reset_value: '0'
- width: 1
- - I2C1_CONSET:
- fields: !!omap
- - AA:
- access: rw
- description: Assert acknowledge flag
- lsb: 2
- reset_value: '0'
- width: 1
- - SI:
- access: rw
- description: I2C interrupt flag
- lsb: 3
- reset_value: '0'
- width: 1
- - STO:
- access: rw
- description: STOP flag
- lsb: 4
- reset_value: '0'
- width: 1
- - STA:
- access: rw
- description: START flag
- lsb: 5
- reset_value: '0'
- width: 1
- - I2EN:
- access: rw
- description: I2C interface enable
- lsb: 6
- reset_value: '0'
- width: 1
- - I2C0_STAT:
- fields: !!omap
- - STATUS:
- access: r
- description: These bits give the actual status information about the I2C interface
- lsb: 3
- reset_value: '0x1f'
- width: 5
- - I2C1_STAT:
- fields: !!omap
- - STATUS:
- access: r
- description: These bits give the actual status information about the I2C interface
- lsb: 3
- reset_value: '0x1f'
- width: 5
- - I2C0_DAT:
- fields: !!omap
- - DATA:
- access: rw
- description: This register holds data values that have been received or are
- to be transmitted
- lsb: 0
- reset_value: '0'
- width: 8
- - I2C1_DAT:
- fields: !!omap
- - DATA:
- access: rw
- description: This register holds data values that have been received or are
- to be transmitted
- lsb: 0
- reset_value: '0'
- width: 8
- - I2C0_ADR0:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_ADR0:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_SCLH:
- fields: !!omap
- - SCLH:
- access: rw
- description: Count for SCL HIGH time period selection
- lsb: 0
- reset_value: '0x0004'
- width: 16
- - I2C1_SCLH:
- fields: !!omap
- - SCLH:
- access: rw
- description: Count for SCL HIGH time period selection
- lsb: 0
- reset_value: '0x0004'
- width: 16
- - I2C0_SCLL:
- fields: !!omap
- - SCLL:
- access: rw
- description: Count for SCL LOW time period selection
- lsb: 0
- reset_value: '0x0004'
- width: 16
- - I2C1_SCLL:
- fields: !!omap
- - SCLL:
- access: rw
- description: Count for SCL LOW time period selection
- lsb: 0
- reset_value: '0x0004'
- width: 16
- - I2C0_CONCLR:
- fields: !!omap
- - AAC:
- access: w
- description: Assert acknowledge Clear bit
- lsb: 2
- reset_value: '0'
- width: 1
- - SIC:
- access: w
- description: I2C interrupt Clear bit
- lsb: 3
- reset_value: '0'
- width: 1
- - STAC:
- access: w
- description: START flag Clear bit
- lsb: 5
- reset_value: '0'
- width: 1
- - I2ENC:
- access: w
- description: I2C interface Disable bit
- lsb: 6
- reset_value: '0'
- width: 1
- - I2C1_CONCLR:
- fields: !!omap
- - AAC:
- access: w
- description: Assert acknowledge Clear bit
- lsb: 2
- reset_value: '0'
- width: 1
- - SIC:
- access: w
- description: I2C interrupt Clear bit
- lsb: 3
- reset_value: '0'
- width: 1
- - STAC:
- access: w
- description: START flag Clear bit
- lsb: 5
- reset_value: '0'
- width: 1
- - I2ENC:
- access: w
- description: I2C interface Disable bit
- lsb: 6
- reset_value: '0'
- width: 1
- - I2C0_MMCTRL:
- fields: !!omap
- - MM_ENA:
- access: rw
- description: Monitor mode enable
- lsb: 0
- reset_value: '0'
- width: 1
- - ENA_SCL:
- access: rw
- description: SCL output enable
- lsb: 1
- reset_value: '0'
- width: 1
- - MATCH_ALL:
- access: rw
- description: Select interrupt register match
- lsb: 2
- reset_value: '0'
- width: 1
- - I2C1_MMCTRL:
- fields: !!omap
- - MM_ENA:
- access: rw
- description: Monitor mode enable
- lsb: 0
- reset_value: '0'
- width: 1
- - ENA_SCL:
- access: rw
- description: SCL output enable
- lsb: 1
- reset_value: '0'
- width: 1
- - MATCH_ALL:
- access: rw
- description: Select interrupt register match
- lsb: 2
- reset_value: '0'
- width: 1
- - I2C0_ADR1:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_ADR1:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_ADR2:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_ADR2:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_ADR3:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_ADR3:
- fields: !!omap
- - GC:
- access: rw
- description: General Call enable bit
- lsb: 0
- reset_value: '0'
- width: 1
- - ADDRESS:
- access: rw
- description: The I2C device address for slave mode
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_DATA_BUFFER:
- fields: !!omap
- - DATA:
- access: r
- description: This register holds contents of the 8 MSBs of the DAT shift register
- lsb: 0
- reset_value: '0'
- width: 8
- - I2C1_DATA_BUFFER:
- fields: !!omap
- - DATA:
- access: r
- description: This register holds contents of the 8 MSBs of the DAT shift register
- lsb: 0
- reset_value: '0'
- width: 8
- - I2C0_MASK0:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_MASK0:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_MASK1:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_MASK1:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_MASK2:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_MASK2:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C0_MASK3:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
- - I2C1_MASK3:
- fields: !!omap
- - MASK:
- access: rw
- description: Mask bits
- lsb: 1
- reset_value: '0'
- width: 7
|